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| author | Alan Modra <amodra@gmail.com> | 2018-08-29 13:28:21 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2018-08-31 22:15:05 +0930 |
| commit | 4a9699735b04d4629bd3dc418c265e7f0bc1f9ce (patch) | |
| tree | 6f92e1b94b3aa09e8a36e65d8d83823c94278ec3 /bfd/cpu-msp430.c | |
| parent | f891966ff66639673a5207b94bd68ec928fb68bc (diff) | |
| download | binutils-4a9699735b04d4629bd3dc418c265e7f0bc1f9ce.zip binutils-4a9699735b04d4629bd3dc418c265e7f0bc1f9ce.tar.gz binutils-4a9699735b04d4629bd3dc418c265e7f0bc1f9ce.tar.bz2 | |
PowerPC64 higher REL16 relocations
There are occasions where someone might want to build a 64-bit
pc-relative offset from 16-bit pieces. This adds the necessary REL16
relocs corresponding to existing ADDR16 relocs that can be used to
build 64-bit absolute values.
include/
* elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
(R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
(R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
bfd/
* reloc.c (BFD_RELOC_PPC64_REL16_HIGH, BFD_RELOC_PPC64_REL16_HIGHA),
(BFD_RELOC_PPC64_REL16_HIGHER, BFD_RELOC_PPC64_REL16_HIGHERA),
(BFD_RELOC_PPC64_REL16_HIGHEST, BFD_RELOC_PPC64_REL16_HIGHESTA):
Define.
* elf64-ppc.c (ppc64_elf_howto_raw): Add new REL16 howtos.
(ppc64_elf_reloc_type_lookup): Translate new REL16 relocs.
(ppc64_elf_check_relocs, ppc64_elf_relocate_section): Handle them.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Allow ADDR16
HIGH, HIGHA, HIGHER, HIGHERA, HIGHEST, and HIGHESTA relocs.
Group 16-bit relocs.
* config/tc-ppc.c (md_apply_fix): Translate those ADDR16 relocs
to REL16 when pcrel. Sort relocs.
Diffstat (limited to 'bfd/cpu-msp430.c')
0 files changed, 0 insertions, 0 deletions