Use bool in bfd

	* sysdep.h: POISON_BFD_BOOLEAN: Define.
	* aix5ppc-core.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h,
	* aoutx.h, * arc-got.h, * archive.c, * archive64.c, * archures.c,
	* bfd-in.h, * bfd.c, * bfdwin.c, * binary.c, * cache.c,
	* coff-alpha.c, * coff-arm.c, * coff-arm.h, * coff-bfd.c,
	* coff-bfd.h, * coff-go32.c, * coff-i386.c, * coff-ia64.c,
	* coff-mcore.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c,
	* coff-stgo32.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c,
	* coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c,
	* coffcode.h, * coffgen.c, * cofflink.c, * compress.c,
	* corefile.c, * cpu-aarch64.c, * cpu-aarch64.h, * cpu-alpha.c,
	* cpu-arc.c, * cpu-arm.c, * cpu-arm.h, * cpu-avr.c, * cpu-bfin.c,
	* cpu-bpf.c, * cpu-cr16.c, * cpu-cris.c, * cpu-crx.c,
	* cpu-csky.c, * cpu-d10v.c, * cpu-d30v.c, * cpu-dlx.c,
	* cpu-epiphany.c, * cpu-fr30.c, * cpu-frv.c, * cpu-ft32.c,
	* cpu-h8300.c, * cpu-hppa.c, * cpu-i386.c, * cpu-ia64.c,
	* cpu-iamcu.c, * cpu-ip2k.c, * cpu-iq2000.c, * cpu-k1om.c,
	* cpu-l1om.c, * cpu-lm32.c, * cpu-m10200.c, * cpu-m10300.c,
	* cpu-m32c.c, * cpu-m32r.c, * cpu-m68hc11.c, * cpu-m68hc12.c,
	* cpu-m68k.c, * cpu-m9s12x.c, * cpu-m9s12xg.c, * cpu-mcore.c,
	* cpu-mep.c, * cpu-metag.c, * cpu-microblaze.c, * cpu-mips.c,
	* cpu-mmix.c, * cpu-moxie.c, * cpu-msp430.c, * cpu-mt.c,
	* cpu-nds32.c, * cpu-nfp.c, * cpu-nios2.c, * cpu-ns32k.c,
	* cpu-or1k.c, * cpu-pdp11.c, * cpu-pj.c, * cpu-powerpc.c,
	* cpu-pru.c, * cpu-riscv.c, * cpu-rl78.c, * cpu-rs6000.c,
	* cpu-rx.c, * cpu-s12z.c, * cpu-s390.c, * cpu-score.c,
	* cpu-sh.c, * cpu-sparc.c, * cpu-spu.c, * cpu-tic30.c,
	* cpu-tic4x.c, * cpu-tic54x.c, * cpu-tic6x.c, * cpu-tilegx.c,
	* cpu-tilepro.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-vax.c,
	* cpu-visium.c, * cpu-wasm32.c, * cpu-xc16x.c, * cpu-xgate.c,
	* cpu-xstormy16.c, * cpu-xtensa.c, * cpu-z80.c, * cpu-z8k.c,
	* dwarf1.c, * dwarf2.c, * ecoff-bfd.h, * ecoff.c, * ecofflink.c,
	* elf-attrs.c, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-nacl.c,
	* elf-nacl.h, * elf-properties.c, * elf-s390-common.c,
	* elf-s390.h, * elf-strtab.c, * elf-vxworks.c, * elf-vxworks.h,
	* elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c,
	* elf32-arm.h, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c,
	* elf32-bfin.h, * elf32-cr16.c, * elf32-cr16.h, * elf32-cris.c,
	* elf32-crx.c, * elf32-csky.c, * elf32-csky.h, * elf32-d10v.c,
	* elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
	* elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c,
	* elf32-h8300.c, * elf32-hppa.c, * elf32-hppa.h, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
	* elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c,
	* elf32-m68k.h, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c,
	* elf32-metag.h, * elf32-microblaze.c, * elf32-mips.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-nios2.h, * elf32-or1k.c, * elf32-pj.c,
	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s12z.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score.h, * elf32-score7.c, * elf32-sh-relocs.h,
	* elf32-sh.c, * elf32-sparc.c, * elf32-spu.c, * elf32-spu.h,
	* elf32-tic6x.c, * elf32-tic6x.h, * elf32-tilegx.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-v850.h,
	* elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c,
	* elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
	* elf32-xtensa.c, * elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c,
	* elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c,
	* elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c,
	* elf64-ppc.h, * elf64-s390.c, * elf64-sparc.c,
	* elf64-tilegx.c, * elf64-x86-64.c, * elfcode.h,
	* elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c,
	* elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c,
	* elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h,
	* elfxx-mips.c, * elfxx-mips.h, * elfxx-riscv.c, * elfxx-riscv.h,
	* elfxx-sparc.c, * elfxx-sparc.h, * elfxx-target.h,
	* elfxx-tilegx.c, * elfxx-tilegx.h, * elfxx-x86.c, * elfxx-x86.h,
	* format.c, * genlink.h, * hash.c, * i386aout.c, * i386lynx.c,
	* i386msdos.c, * ihex.c, * libaout.h, * libbfd-in.h,
	* libbfd.c, * libcoff-in.h, * libecoff.h, * libpei.h,
	* libxcoff.h, * linker.c, * mach-o-aarch64.c, * mach-o-arm.c,
	* mach-o-i386.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h,
	* merge.c, * mmo.c, * netbsd.h, * opncls.c, * pc532-mach.c,
	* pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-sh.c,
	* pe-x86_64.c, * peXXigen.c, * pef.c, * pei-arm.c, * pei-i386.c,
	* pei-ia64.c, * pei-mcore.c, * pei-sh.c, * pei-x86_64.c,
	* peicode.h, * plugin.c, * plugin.h, * ppcboot.c, * reloc.c,
	* reloc16.c, * rs6000-core.c, * section.c, * simple.c, * som.c,
	* som.h, * srec.c, * stabs.c, * syms.c, * targets.c, * tekhex.c,
	* verilog.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * vms.h,
	* wasm-module.c, * xcofflink.c, * xcofflink.h, * xsym.c,
	* xsym.h: Replace bfd_boolean with bool, FALSE with false, and
	TRUE with true throughout.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* libcoff.h: Regenerate.

1 files changed, 184 insertions, 184 deletions

diff --git a/bfd/coff-sh.c b/bfd/coff-sh.c
index 04ef99b..10d203f 100644
--- a/bfd/coff-sh.c
+++ b/bfd/coff-sh.c
@@ -35,10 +35,10 @@
 #include "coff/pe.h"
 
 #ifndef COFF_IMAGE_WITH_PE
-static bfd_boolean sh_align_load_span
+static bool sh_align_load_span
   (bfd *, asection *, bfd_byte *,
-   bfd_boolean (*) (bfd *, asection *, void *, bfd_byte *, bfd_vma),
-   void *, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, bfd_boolean *);
+   bool (*) (bfd *, asection *, void *, bfd_byte *, bfd_vma),
+   void *, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, bool *);
 
 #define _bfd_sh_align_load_span sh_align_load_span
 #endif
@@ -75,7 +75,7 @@ static bfd_boolean sh_align_load_span
 /* Return TRUE if this relocation should
    appear in the output .reloc section.  */
 
-static bfd_boolean
+static bool
 in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
 	    reloc_howto_type * howto)
 {
@@ -85,13 +85,13 @@ in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
 
 static bfd_reloc_status_type
 sh_reloc (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
-static bfd_boolean
+static bool
 sh_relocate_section (bfd *, struct bfd_link_info *, bfd *, asection *,
 		     bfd_byte *, struct internal_reloc *,
 		     struct internal_syment *, asection **);
-static bfd_boolean
+static bool
 sh_align_loads (bfd *, asection *, struct internal_reloc *,
-		bfd_byte *, bfd_boolean *);
+		bfd_byte *, bool *);
 
 /* The supported relocations.  There are a lot of relocations defined
    in coff/internal.h which we do not expect to ever see.  */
@@ -105,15 +105,15 @@ static reloc_howto_type sh_coff_howtos[] =
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_imm32ce",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 #else
   EMPTY_HOWTO (2),
 #endif
@@ -129,15 +129,15 @@ static reloc_howto_type sh_coff_howtos[] =
 	 1,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 8,			/* bitsize */
-	 TRUE,			/* pc_relative */
+	 true,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_signed, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_pcdisp8by2",	/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xff,			/* src_mask */
 	 0xff,			/* dst_mask */
-	 TRUE),			/* pcrel_offset */
+	 true),			/* pcrel_offset */
 
   EMPTY_HOWTO (11), /* R_SH_PCDISP8 */
 
@@ -145,15 +145,15 @@ static reloc_howto_type sh_coff_howtos[] =
 	 1,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 12,			/* bitsize */
-	 TRUE,			/* pc_relative */
+	 true,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_signed, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_pcdisp12by2",	/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xfff,			/* src_mask */
 	 0xfff,			/* dst_mask */
-	 TRUE),			/* pcrel_offset */
+	 true),			/* pcrel_offset */
 
   EMPTY_HOWTO (13),
 
@@ -161,15 +161,15 @@ static reloc_howto_type sh_coff_howtos[] =
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_imm32",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   EMPTY_HOWTO (15),
 #ifdef COFF_WITH_PE
@@ -177,15 +177,15 @@ static reloc_howto_type sh_coff_howtos[] =
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "rva32",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 #else
   EMPTY_HOWTO (16), /* R_SH_IMM8 */
 #endif
@@ -199,169 +199,169 @@ static reloc_howto_type sh_coff_howtos[] =
 	 1,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 8,			/* bitsize */
-	 TRUE,			/* pc_relative */
+	 true,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_unsigned, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_pcrelimm8by2",	/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xff,			/* src_mask */
 	 0xff,			/* dst_mask */
-	 TRUE),			/* pcrel_offset */
+	 true),			/* pcrel_offset */
 
   HOWTO (R_SH_PCRELIMM8BY4,	/* type */
 	 2,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 8,			/* bitsize */
-	 TRUE,			/* pc_relative */
+	 true,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_unsigned, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_pcrelimm8by4",	/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xff,			/* src_mask */
 	 0xff,			/* dst_mask */
-	 TRUE),			/* pcrel_offset */
+	 true),			/* pcrel_offset */
 
   HOWTO (R_SH_IMM16,		/* type */
 	 0,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 16,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_imm16",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffff,		/* src_mask */
 	 0xffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_SWITCH16,		/* type */
 	 0,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 16,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_switch16",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffff,		/* src_mask */
 	 0xffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_SWITCH32,		/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_switch32",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_USES,		/* type */
 	 0,			/* rightshift */
 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
 	 16,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_uses",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffff,		/* src_mask */
 	 0xffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_COUNT,		/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_count",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_ALIGN,		/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_align",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_CODE,		/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_code",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_DATA,		/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_data",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_LABEL,		/* type */
 	 0,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
 	 32,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_label",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xffffffff,		/* src_mask */
 	 0xffffffff,		/* dst_mask */
-	 FALSE),		/* pcrel_offset */
+	 false),		/* pcrel_offset */
 
   HOWTO (R_SH_SWITCH8,		/* type */
 	 0,			/* rightshift */
 	 0,			/* size (0 = byte, 1 = short, 2 = long) */
 	 8,			/* bitsize */
-	 FALSE,			/* pc_relative */
+	 false,			/* pc_relative */
 	 0,			/* bitpos */
 	 complain_overflow_bitfield, /* complain_on_overflow */
 	 sh_reloc,		/* special_function */
 	 "r_switch8",		/* name */
-	 TRUE,			/* partial_inplace */
+	 true,			/* partial_inplace */
 	 0xff,			/* src_mask */
 	 0xff,			/* dst_mask */
-	 FALSE)			/* pcrel_offset */
+	 false)			/* pcrel_offset */
 };
 
 #define SH_COFF_HOWTO_COUNT (sizeof sh_coff_howtos / sizeof sh_coff_howtos[0])
@@ -656,7 +656,7 @@ sh_reloc (bfd *      abfd,
 
 #include "coffcode.h"
 
-static bfd_boolean
+static bool
 sh_relax_delete_bytes (bfd *, asection *, bfd_vma, int);
 
 /* This function handles relaxing on the SH.
@@ -702,40 +702,40 @@ sh_relax_delete_bytes (bfd *, asection *, bfd_vma, int);
    align load and store instructions on four byte boundaries if we
    can, by swapping them with one of the adjacent instructions.  */
 
-static bfd_boolean
+static bool
 sh_relax_section (bfd *abfd,
 		  asection *sec,
 		  struct bfd_link_info *link_info,
-		  bfd_boolean *again)
+		  bool *again)
 {
   struct internal_reloc *internal_relocs;
-  bfd_boolean have_code;
+  bool have_code;
   struct internal_reloc *irel, *irelend;
   bfd_byte *contents = NULL;
 
-  *again = FALSE;
+  *again = false;
 
   if (bfd_link_relocatable (link_info)
       || (sec->flags & SEC_RELOC) == 0
       || sec->reloc_count == 0)
-    return TRUE;
+    return true;
 
   if (coff_section_data (abfd, sec) == NULL)
     {
       size_t amt = sizeof (struct coff_section_tdata);
       sec->used_by_bfd = bfd_zalloc (abfd, amt);
       if (sec->used_by_bfd == NULL)
-	return FALSE;
+	return false;
     }
 
   internal_relocs = (_bfd_coff_read_internal_relocs
 		     (abfd, sec, link_info->keep_memory,
-		      (bfd_byte *) NULL, FALSE,
+		      (bfd_byte *) NULL, false,
 		      (struct internal_reloc *) NULL));
   if (internal_relocs == NULL)
     goto error_return;
 
-  have_code = FALSE;
+  have_code = false;
 
   irelend = internal_relocs + sec->reloc_count;
   for (irel = internal_relocs; irel < irelend; irel++)
@@ -747,7 +747,7 @@ sh_relax_section (bfd *abfd,
       bfd_signed_vma foff;
 
       if (irel->r_type == R_SH_CODE)
-	have_code = TRUE;
+	have_code = true;
 
       if (irel->r_type != R_SH_USES)
 	continue;
@@ -904,12 +904,12 @@ sh_relax_section (bfd *abfd,
 	 the linker is run.  */
 
       coff_section_data (abfd, sec)->relocs = internal_relocs;
-      coff_section_data (abfd, sec)->keep_relocs = TRUE;
+      coff_section_data (abfd, sec)->keep_relocs = true;
 
       coff_section_data (abfd, sec)->contents = contents;
-      coff_section_data (abfd, sec)->keep_contents = TRUE;
+      coff_section_data (abfd, sec)->keep_contents = true;
 
-      obj_coff_keep_syms (abfd) = TRUE;
+      obj_coff_keep_syms (abfd) = true;
 
       /* Replace the jsr with a bsr.  */
 
@@ -965,7 +965,7 @@ sh_relax_section (bfd *abfd,
       /* That will change things, so, just in case it permits some
 	 other function call to come within range, we should relax
 	 again.  Note that this is not required, and it may be slow.  */
-      *again = TRUE;
+      *again = true;
 
       /* Now check whether we got a COUNT reloc.  */
       if (irelcount >= irelend)
@@ -1006,7 +1006,7 @@ sh_relax_section (bfd *abfd,
      byte boundaries.  */
   if (have_code)
     {
-      bfd_boolean swapped;
+      bool swapped;
 
       /* Get the section contents.  */
       if (contents == NULL)
@@ -1026,12 +1026,12 @@ sh_relax_section (bfd *abfd,
       if (swapped)
 	{
 	  coff_section_data (abfd, sec)->relocs = internal_relocs;
-	  coff_section_data (abfd, sec)->keep_relocs = TRUE;
+	  coff_section_data (abfd, sec)->keep_relocs = true;
 
 	  coff_section_data (abfd, sec)->contents = contents;
-	  coff_section_data (abfd, sec)->keep_contents = TRUE;
+	  coff_section_data (abfd, sec)->keep_contents = true;
 
-	  obj_coff_keep_syms (abfd) = TRUE;
+	  obj_coff_keep_syms (abfd) = true;
 	}
     }
 
@@ -1053,19 +1053,19 @@ sh_relax_section (bfd *abfd,
 	coff_section_data (abfd, sec)->contents = contents;
     }
 
-  return TRUE;
+  return true;
 
  error_return:
   if (internal_relocs != coff_section_data (abfd, sec)->relocs)
     free (internal_relocs);
   if (contents != coff_section_data (abfd, sec)->contents)
     free (contents);
-  return FALSE;
+  return false;
 }
 
 /* Delete some bytes from a section while relaxing.  */
 
-static bfd_boolean
+static bool
 sh_relax_delete_bytes (bfd *abfd,
 		       asection *sec,
 		       bfd_vma addr,
@@ -1127,7 +1127,7 @@ sh_relax_delete_bytes (bfd *abfd,
       struct internal_syment sym;
       int off, adjust, oinsn;
       bfd_signed_vma voff = 0;
-      bfd_boolean overflow;
+      bool overflow;
 
       /* Get the new reloc address.  */
       nraddr = irel->r_vaddr - sec->vma;
@@ -1289,7 +1289,7 @@ sh_relax_delete_bytes (bfd *abfd,
       if (adjust != 0)
 	{
 	  oinsn = insn;
-	  overflow = FALSE;
+	  overflow = false;
 	  switch (irel->r_type)
 	    {
 	    default:
@@ -1300,14 +1300,14 @@ sh_relax_delete_bytes (bfd *abfd,
 	    case R_SH_PCRELIMM8BY2:
 	      insn += adjust / 2;
 	      if ((oinsn & 0xff00) != (insn & 0xff00))
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_16 (abfd, (bfd_vma) insn, contents + nraddr);
 	      break;
 
 	    case R_SH_PCDISP:
 	      insn += adjust / 2;
 	      if ((oinsn & 0xf000) != (insn & 0xf000))
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_16 (abfd, (bfd_vma) insn, contents + nraddr);
 	      break;
 
@@ -1321,21 +1321,21 @@ sh_relax_delete_bytes (bfd *abfd,
 		    ++insn;
 		}
 	      if ((oinsn & 0xff00) != (insn & 0xff00))
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_16 (abfd, (bfd_vma) insn, contents + nraddr);
 	      break;
 
 	    case R_SH_SWITCH8:
 	      voff += adjust;
 	      if (voff < 0 || voff >= 0xff)
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_8 (abfd, (bfd_vma) voff, contents + nraddr);
 	      break;
 
 	    case R_SH_SWITCH16:
 	      voff += adjust;
 	      if (voff < - 0x8000 || voff >= 0x8000)
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_signed_16 (abfd, (bfd_vma) voff, contents + nraddr);
 	      break;
 
@@ -1356,7 +1356,7 @@ sh_relax_delete_bytes (bfd *abfd,
 		(_("%pB: %#" PRIx64 ": fatal: reloc overflow while relaxing"),
 		 abfd, (uint64_t) irel->r_vaddr);
 	      bfd_set_error (bfd_error_bad_value);
-	      return FALSE;
+	      return false;
 	    }
 	}
 
@@ -1381,10 +1381,10 @@ sh_relax_delete_bytes (bfd *abfd,
 	 FALSE, we should free them, if we are permitted to, when we
 	 leave sh_coff_relax_section.  */
       internal_relocs = (_bfd_coff_read_internal_relocs
-			 (abfd, o, TRUE, (bfd_byte *) NULL, FALSE,
+			 (abfd, o, true, (bfd_byte *) NULL, false,
 			  (struct internal_reloc *) NULL));
       if (internal_relocs == NULL)
-	return FALSE;
+	return false;
 
       ocontents = NULL;
       irelscanend = internal_relocs + o->reloc_count;
@@ -1420,7 +1420,7 @@ sh_relax_delete_bytes (bfd *abfd,
 		  else
 		    {
 		      if (!bfd_malloc_and_get_section (abfd, o, &ocontents))
-			return FALSE;
+			return false;
 		      /* We always cache the section contents.
 			 Perhaps, if info->keep_memory is FALSE, we
 			 should free them, if we are permitted to,
@@ -1435,7 +1435,7 @@ sh_relax_delete_bytes (bfd *abfd,
 		bfd_put_32 (abfd, val - count,
 			    ocontents + irelscan->r_vaddr - o->vma);
 
-	      coff_section_data (abfd, o)->keep_contents = TRUE;
+	      coff_section_data (abfd, o)->keep_contents = true;
 	    }
 	}
     }
@@ -1450,7 +1450,7 @@ sh_relax_delete_bytes (bfd *abfd,
       _bfd_error_handler
 	(_("%pB: fatal: generic symbols retrieved before relaxing"), abfd);
       bfd_set_error (bfd_error_invalid_operation);
-      return FALSE;
+      return false;
     }
 
   /* Adjust all the symbols.  */
@@ -1503,7 +1503,7 @@ sh_relax_delete_bytes (bfd *abfd,
 	}
     }
 
-  return TRUE;
+  return true;
 }
 
 /* This is yet another version of the SH opcode table, used to rapidly
@@ -2057,7 +2057,7 @@ sh_insn_info (unsigned int insn)
 
 /* See whether an instruction uses a general purpose register.  */
 
-static bfd_boolean
+static bool
 sh_insn_uses_reg (unsigned int insn,
 		  const struct sh_opcode *op,
 		  unsigned int reg)
@@ -2068,24 +2068,24 @@ sh_insn_uses_reg (unsigned int insn,
 
   if ((f & USES1) != 0
       && USES1_REG (insn) == reg)
-    return TRUE;
+    return true;
   if ((f & USES2) != 0
       && USES2_REG (insn) == reg)
-    return TRUE;
+    return true;
   if ((f & USESR0) != 0
       && reg == 0)
-    return TRUE;
+    return true;
   if ((f & USESAS) && reg == USESAS_REG (insn))
-    return TRUE;
+    return true;
   if ((f & USESR8) && reg == 8)
-    return TRUE;
+    return true;
 
-  return FALSE;
+  return false;
 }
 
 /* See whether an instruction sets a general purpose register.  */
 
-static bfd_boolean
+static bool
 sh_insn_sets_reg (unsigned int insn,
 		  const struct sh_opcode *op,
 		  unsigned int reg)
@@ -2096,35 +2096,35 @@ sh_insn_sets_reg (unsigned int insn,
 
   if ((f & SETS1) != 0
       && SETS1_REG (insn) == reg)
-    return TRUE;
+    return true;
   if ((f & SETS2) != 0
       && SETS2_REG (insn) == reg)
-    return TRUE;
+    return true;
   if ((f & SETSR0) != 0
       && reg == 0)
-    return TRUE;
+    return true;
   if ((f & SETSAS) && reg == SETSAS_REG (insn))
-    return TRUE;
+    return true;
 
-  return FALSE;
+  return false;
 }
 
 /* See whether an instruction uses or sets a general purpose register */
 
-static bfd_boolean
+static bool
 sh_insn_uses_or_sets_reg (unsigned int insn,
 			  const struct sh_opcode *op,
 			  unsigned int reg)
 {
   if (sh_insn_uses_reg (insn, op, reg))
-    return TRUE;
+    return true;
 
   return sh_insn_sets_reg (insn, op, reg);
 }
 
 /* See whether an instruction uses a floating point register.  */
 
-static bfd_boolean
+static bool
 sh_insn_uses_freg (unsigned int insn,
 		   const struct sh_opcode *op,
 		   unsigned int freg)
@@ -2144,20 +2144,20 @@ sh_insn_uses_freg (unsigned int insn,
 
   if ((f & USESF1) != 0
       && (USESF1_REG (insn) & 0xe) == (freg & 0xe))
-    return TRUE;
+    return true;
   if ((f & USESF2) != 0
       && (USESF2_REG (insn) & 0xe) == (freg & 0xe))
-    return TRUE;
+    return true;
   if ((f & USESF0) != 0
       && freg == 0)
-    return TRUE;
+    return true;
 
-  return FALSE;
+  return false;
 }
 
 /* See whether an instruction sets a floating point register.  */
 
-static bfd_boolean
+static bool
 sh_insn_sets_freg (unsigned int insn,
 		   const struct sh_opcode *op,
 		   unsigned int freg)
@@ -2177,20 +2177,20 @@ sh_insn_sets_freg (unsigned int insn,
 
   if ((f & SETSF1) != 0
       && (SETSF1_REG (insn) & 0xe) == (freg & 0xe))
-    return TRUE;
+    return true;
 
-  return FALSE;
+  return false;
 }
 
 /* See whether an instruction uses or sets a floating point register */
 
-static bfd_boolean
+static bool
 sh_insn_uses_or_sets_freg (unsigned int insn,
 			   const struct sh_opcode *op,
 			   unsigned int reg)
 {
   if (sh_insn_uses_freg (insn, op, reg))
-    return TRUE;
+    return true;
 
   return sh_insn_sets_freg (insn, op, reg);
 }
@@ -2200,7 +2200,7 @@ sh_insn_uses_or_sets_freg (unsigned int insn,
    This should return TRUE if there is a conflict, or FALSE if the
    instructions can be swapped safely.  */
 
-static bfd_boolean
+static bool
 sh_insns_conflict (unsigned int i1,
 		   const struct sh_opcode *op1,
 		   unsigned int i2,
@@ -2215,57 +2215,57 @@ sh_insns_conflict (unsigned int i1,
      FIXME: shouldn't test raw opcodes here.  */
   if (((i1 & 0xf0ff) == 0x4066 && (i2 & 0xf000) == 0xf000)
       || ((i2 & 0xf0ff) == 0x4066 && (i1 & 0xf000) == 0xf000))
-    return TRUE;
+    return true;
 
   if ((f1 & (BRANCH | DELAY)) != 0
       || (f2 & (BRANCH | DELAY)) != 0)
-    return TRUE;
+    return true;
 
   if (((f1 | f2) & SETSSP)
       && (f1 & (SETSSP | USESSP))
       && (f2 & (SETSSP | USESSP)))
-    return TRUE;
+    return true;
 
   if ((f1 & SETS1) != 0
       && sh_insn_uses_or_sets_reg (i2, op2, SETS1_REG (i1)))
-    return TRUE;
+    return true;
   if ((f1 & SETS2) != 0
       && sh_insn_uses_or_sets_reg (i2, op2, SETS2_REG (i1)))
-    return TRUE;
+    return true;
   if ((f1 & SETSR0) != 0
       && sh_insn_uses_or_sets_reg (i2, op2, 0))
-    return TRUE;
+    return true;
   if ((f1 & SETSAS)
       && sh_insn_uses_or_sets_reg (i2, op2, SETSAS_REG (i1)))
-    return TRUE;
+    return true;
   if ((f1 & SETSF1) != 0
       && sh_insn_uses_or_sets_freg (i2, op2, SETSF1_REG (i1)))
-    return TRUE;
+    return true;
 
   if ((f2 & SETS1) != 0
       && sh_insn_uses_or_sets_reg (i1, op1, SETS1_REG (i2)))
-    return TRUE;
+    return true;
   if ((f2 & SETS2) != 0
       && sh_insn_uses_or_sets_reg (i1, op1, SETS2_REG (i2)))
-    return TRUE;
+    return true;
   if ((f2 & SETSR0) != 0
       && sh_insn_uses_or_sets_reg (i1, op1, 0))
-    return TRUE;
+    return true;
   if ((f2 & SETSAS)
       && sh_insn_uses_or_sets_reg (i1, op1, SETSAS_REG (i2)))
-    return TRUE;
+    return true;
   if ((f2 & SETSF1) != 0
       && sh_insn_uses_or_sets_freg (i1, op1, SETSF1_REG (i2)))
-    return TRUE;
+    return true;
 
   /* The instructions do not conflict.  */
-  return FALSE;
+  return false;
 }
 
 /* I1 is a load instruction, and I2 is some other instruction.  Return
    TRUE if I1 loads a register which I2 uses.  */
 
-static bfd_boolean
+static bool
 sh_load_use (unsigned int i1,
 	     const struct sh_opcode *op1,
 	     unsigned int i2,
@@ -2276,7 +2276,7 @@ sh_load_use (unsigned int i1,
   f1 = op1->flags;
 
   if ((f1 & LOAD) == 0)
-    return FALSE;
+    return false;
 
   /* If both SETS1 and SETSSP are set, that means a load to a special
      register using postincrement addressing mode, which we don't care
@@ -2284,17 +2284,17 @@ sh_load_use (unsigned int i1,
   if ((f1 & SETS1) != 0
       && (f1 & SETSSP) == 0
       && sh_insn_uses_reg (i2, op2, (i1 & 0x0f00) >> 8))
-    return TRUE;
+    return true;
 
   if ((f1 & SETSR0) != 0
       && sh_insn_uses_reg (i2, op2, 0))
-    return TRUE;
+    return true;
 
   if ((f1 & SETSF1) != 0
       && sh_insn_uses_freg (i2, op2, (i1 & 0x0f00) >> 8))
-    return TRUE;
+    return true;
 
-  return FALSE;
+  return false;
 }
 
 /* Try to align loads and stores within a span of memory.  This is
@@ -2310,17 +2310,17 @@ sh_load_use (unsigned int i1,
 #ifdef COFF_WITH_PE
 static
 #endif
-bfd_boolean
+bool
 _bfd_sh_align_load_span (bfd *abfd,
 			 asection *sec,
 			 bfd_byte *contents,
-			 bfd_boolean (*swap) (bfd *, asection *, void *, bfd_byte *, bfd_vma),
+			 bool (*swap) (bfd *, asection *, void *, bfd_byte *, bfd_vma),
 			 void * relocs,
 			 bfd_vma **plabel,
 			 bfd_vma *label_end,
 			 bfd_vma start,
 			 bfd_vma stop,
-			 bfd_boolean *pswapped)
+			 bool *pswapped)
 {
   int dsp = (abfd->arch_info->mach == bfd_mach_sh_dsp
 	     || abfd->arch_info->mach == bfd_mach_sh3_dsp);
@@ -2330,7 +2330,7 @@ _bfd_sh_align_load_span (bfd *abfd,
      desirable.  In fact, it is counter-productive, since it interferes
      with the schedules generated by the compiler.  */
   if (abfd->arch_info->mach == bfd_mach_sh4)
-    return TRUE;
+    return true;
 
   /* If we are linking sh[3]-dsp code, swap the FPU instructions for DSP
      instructions.  */
@@ -2404,14 +2404,14 @@ _bfd_sh_align_load_span (bfd *abfd,
 	  && (prev_op->flags & (LOAD | STORE)) == 0
 	  && ! sh_insns_conflict (prev_insn, prev_op, insn, op))
 	{
-	  bfd_boolean ok;
+	  bool ok;
 
 	  /* The load/store instruction does not have a label, and
 	     there is a previous instruction; PREV_INSN is not
 	     itself a load/store instruction, and PREV_INSN and
 	     INSN do not conflict.  */
 
-	  ok = TRUE;
+	  ok = true;
 
 	  if (i >= start + 4)
 	    {
@@ -2426,7 +2426,7 @@ _bfd_sh_align_load_span (bfd *abfd,
 		 can not swap.  */
 	      if (prev2_op == NULL
 		  || (prev2_op->flags & DELAY) != 0)
-		ok = FALSE;
+		ok = false;
 
 	      /* If the instruction before PREV_INSN is a load,
 		 and it sets a register which INSN uses, then
@@ -2436,14 +2436,14 @@ _bfd_sh_align_load_span (bfd *abfd,
 	      if (ok
 		  && (prev2_op->flags & LOAD) != 0
 		  && sh_load_use (prev2_insn, prev2_op, insn, op))
-		ok = FALSE;
+		ok = false;
 	    }
 
 	  if (ok)
 	    {
 	      if (! (*swap) (abfd, sec, relocs, contents, i - 2))
-		return FALSE;
-	      *pswapped = TRUE;
+		return false;
+	      *pswapped = true;
 	      continue;
 	    }
 	}
@@ -2465,12 +2465,12 @@ _bfd_sh_align_load_span (bfd *abfd,
 	      && (next_op->flags & (LOAD | STORE)) == 0
 	      && ! sh_insns_conflict (insn, op, next_insn, next_op))
 	    {
-	      bfd_boolean ok;
+	      bool ok;
 
 	      /* NEXT_INSN is not itself a load/store instruction,
 		 and it does not conflict with INSN.  */
 
-	      ok = TRUE;
+	      ok = true;
 
 	      /* If PREV_INSN is a load, and it sets a register
 		 which NEXT_INSN uses, then putting NEXT_INSN
@@ -2479,7 +2479,7 @@ _bfd_sh_align_load_span (bfd *abfd,
 	      if (prev_op != NULL
 		  && (prev_op->flags & LOAD) != 0
 		  && sh_load_use (prev_insn, prev_op, next_insn, next_op))
-		ok = FALSE;
+		ok = false;
 
 	      /* If INSN is a load, and it sets a register which
 		 the insn after NEXT_INSN uses, then doing the
@@ -2502,27 +2502,27 @@ _bfd_sh_align_load_span (bfd *abfd,
 		  if (next2_op == NULL
 		      || ((next2_op->flags & (LOAD | STORE)) == 0
 			  && sh_load_use (insn, op, next2_insn, next2_op)))
-		    ok = FALSE;
+		    ok = false;
 		}
 
 	      if (ok)
 		{
 		  if (! (*swap) (abfd, sec, relocs, contents, i))
-		    return FALSE;
-		  *pswapped = TRUE;
+		    return false;
+		  *pswapped = true;
 		  continue;
 		}
 	    }
 	}
     }
 
-  return TRUE;
+  return true;
 }
 #endif /* not COFF_IMAGE_WITH_PE */
 
 /* Swap two SH instructions.  */
 
-static bfd_boolean
+static bool
 sh_swap_insns (bfd *      abfd,
 	       asection * sec,
 	       void *     relocs,
@@ -2589,10 +2589,10 @@ sh_swap_insns (bfd *      abfd,
 	{
 	  bfd_byte *loc;
 	  unsigned short insn, oinsn;
-	  bfd_boolean overflow;
+	  bool overflow;
 
 	  loc = contents + irel->r_vaddr - sec->vma;
-	  overflow = FALSE;
+	  overflow = false;
 	  switch (type)
 	    {
 	    default:
@@ -2604,7 +2604,7 @@ sh_swap_insns (bfd *      abfd,
 	      oinsn = insn;
 	      insn += add / 2;
 	      if ((oinsn & 0xff00) != (insn & 0xff00))
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_16 (abfd, (bfd_vma) insn, loc);
 	      break;
 
@@ -2613,7 +2613,7 @@ sh_swap_insns (bfd *      abfd,
 	      oinsn = insn;
 	      insn += add / 2;
 	      if ((oinsn & 0xf000) != (insn & 0xf000))
-		overflow = TRUE;
+		overflow = true;
 	      bfd_put_16 (abfd, (bfd_vma) insn, loc);
 	      break;
 
@@ -2630,7 +2630,7 @@ sh_swap_insns (bfd *      abfd,
 		  oinsn = insn;
 		  insn += add / 2;
 		  if ((oinsn & 0xff00) != (insn & 0xff00))
-		    overflow = TRUE;
+		    overflow = true;
 		  bfd_put_16 (abfd, (bfd_vma) insn, loc);
 		}
 
@@ -2644,12 +2644,12 @@ sh_swap_insns (bfd *      abfd,
 		(_("%pB: %#" PRIx64 ": fatal: reloc overflow while relaxing"),
 		 abfd, (uint64_t) irel->r_vaddr);
 	      bfd_set_error (bfd_error_bad_value);
-	      return FALSE;
+	      return false;
 	    }
 	}
     }
 
-  return TRUE;
+  return true;
 }
 
 /* Look for loads and stores which we can align to four byte
@@ -2657,19 +2657,19 @@ sh_swap_insns (bfd *      abfd,
    this is desirable.  This sets *PSWAPPED if some instruction was
    swapped.  */
 
-static bfd_boolean
+static bool
 sh_align_loads (bfd *abfd,
 		asection *sec,
 		struct internal_reloc *internal_relocs,
 		bfd_byte *contents,
-		bfd_boolean *pswapped)
+		bool *pswapped)
 {
   struct internal_reloc *irel, *irelend;
   bfd_vma *labels = NULL;
   bfd_vma *label, *label_end;
   bfd_size_type amt;
 
-  *pswapped = FALSE;
+  *pswapped = false;
 
   irelend = internal_relocs + sec->reloc_count;
 
@@ -2719,17 +2719,17 @@ sh_align_loads (bfd *abfd,
 
   free (labels);
 
-  return TRUE;
+  return true;
 
  error_return:
   free (labels);
-  return FALSE;
+  return false;
 }
 
 /* This is a modification of _bfd_coff_generic_relocate_section, which
    will handle SH relaxing.  */
 
-static bfd_boolean
+static bool
 sh_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
 		     struct bfd_link_info *info,
 		     bfd *input_bfd,
@@ -2781,7 +2781,7 @@ sh_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
 		(_("%pB: illegal symbol index %ld in relocs"),
 		 input_bfd, symndx);
 	      bfd_set_error (bfd_error_bad_value);
-	      return FALSE;
+	      return false;
 	    }
 	  h = obj_coff_sym_hashes (input_bfd)[symndx];
 	  sym = syms + symndx;
@@ -2803,7 +2803,7 @@ sh_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
       if (howto == NULL)
 	{
 	  bfd_set_error (bfd_error_bad_value);
-	  return FALSE;
+	  return false;
 	}
 
 #ifdef COFF_WITH_PE
@@ -2850,7 +2850,7 @@ sh_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
 	  else if (! bfd_link_relocatable (info))
 	    (*info->callbacks->undefined_symbol)
 	      (info, h->root.root.string, input_bfd, input_section,
-	       rel->r_vaddr - input_section->vma, TRUE);
+	       rel->r_vaddr - input_section->vma, true);
 	}
 
       rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
@@ -2891,7 +2891,7 @@ sh_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
 	}
     }
 
-  return TRUE;
+  return true;
 }
 
 /* This is a version of bfd_generic_get_relocated_section_contents
@@ -2902,7 +2902,7 @@ sh_coff_get_relocated_section_contents (bfd *output_bfd,
 					struct bfd_link_info *link_info,
 					struct bfd_link_order *link_order,
 					bfd_byte *data,
-					bfd_boolean relocatable,
+					bool relocatable,
 					asymbol **symbols)
 {
   asection *input_section = link_order->u.indirect.section;
@@ -2937,8 +2937,8 @@ sh_coff_get_relocated_section_contents (bfd *output_bfd,
 	goto error_return;
 
       internal_relocs = (_bfd_coff_read_internal_relocs
-			 (input_bfd, input_section, FALSE, (bfd_byte *) NULL,
-			  FALSE, (struct internal_reloc *) NULL));
+			 (input_bfd, input_section, false, (bfd_byte *) NULL,
+			  false, (struct internal_reloc *) NULL));
       if (internal_relocs == NULL)
 	goto error_return;
 
@@ -3052,18 +3052,18 @@ coff_small_object_p (bfd *abfd)
 
 /* Set the section alignment for the small versions.  */
 
-static bfd_boolean
+static bool
 coff_small_new_section_hook (bfd *abfd, asection *section)
 {
   if (! coff_new_section_hook (abfd, section))
-    return FALSE;
+    return false;
 
   /* We must align to at least a four byte boundary, because longword
      accesses must be on a four byte boundary.  */
   if (section->alignment_power == COFF_DEFAULT_SECTION_ALIGNMENT_POWER)
     section->alignment_power = 2;
 
-  return TRUE;
+  return true;
 }
 
 /* This is copied from bfd_coff_std_swap_table so that we can change
@@ -3078,16 +3078,16 @@ static bfd_coff_backend_data bfd_coff_small_swap_table =
   coff_swap_scnhdr_out,
   FILHSZ, AOUTSZ, SCNHSZ, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN,
 #ifdef COFF_LONG_FILENAMES
-  TRUE,
+  true,
 #else
-  FALSE,
+  false,
 #endif
   COFF_DEFAULT_LONG_SECTION_NAMES,
   2,
 #ifdef COFF_FORCE_SYMBOLS_IN_STRINGS
-  TRUE,
+  true,
 #else
-  FALSE,
+  false,
 #endif
 #ifdef COFF_DEBUG_STRING_WIDE_PREFIX
   4,