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authormengqinggang <mengqinggang@loongson.cn>2022-12-01 17:23:14 +0800
committerliuzhensong <liuzhensong@loongson.cn>2024-01-04 19:08:53 +0800
commite493ba6255aec08885affbb68ddc0a025583d528 (patch)
tree907c8311ad1cef9bf1233eb73685c9e10dfbb657 /bfd/PORTING
parentb7a5722ebdd24a0d15d56e96d30a649ea1d7b0ee (diff)
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LoongArch: Fix linker generate PLT entry for data symbol
With old "medium" code model, we call a function with a pair of PCALAU12I and JIRL instructions. The assembler produces something like: 8: 1a00000c pcalau12i $t0, 0 8: R_LARCH_PCALA_HI20 g c: 4c000181 jirl $ra, $t0, 0 c: R_LARCH_PCALA_LO12 g The linker generates a "PLT entry" for data without any diagnostic. If "g" is a data symbol and ld with -shared option, it may load two instructions in the PLT. Without -shared option, loongarch_elf_adjust_dynamic_symbol can delete PLT entry. For R_LARCH_PCALA_HI20 relocation, linker only generate PLT entry for STT_FUNC and STT_GNU_IFUNC symbols.
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