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| author | Peter Bergner <bergner@linux.ibm.com> | 2024-11-06 14:02:35 -0600 |
|---|---|---|
| committer | Peter Bergner <bergner@linux.ibm.com> | 2024-11-20 18:33:07 -0500 |
| commit | e7bc2c935ca049f754105d58cc0de8b7b67a1c69 (patch) | |
| tree | 8095316d51d03f52e1699e5882729265187191c7 | |
| parent | b6f3ac06eec82b1a9d41a4583261ff022c9e9843 (diff) | |
| download | binutils-e7bc2c935ca049f754105d58cc0de8b7b67a1c69.zip binutils-e7bc2c935ca049f754105d58cc0de8b7b67a1c69.tar.gz binutils-e7bc2c935ca049f754105d58cc0de8b7b67a1c69.tar.bz2 | |
PowerPC: Add support for RFC02677 - VSX Vector Rotate Left Word
opcodes/
* ppc-opc.c (powerpc_opcodes): Add xvrlw.
gas/
* testsuite/gas/ppc/future.s: Add test for xvrlw.
* testsuite/gas/ppc/future.d: Likewise.
| -rw-r--r-- | gas/testsuite/gas/ppc/future.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/future.s | 1 | ||||
| -rw-r--r-- | opcodes/ppc-opc.c | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/gas/testsuite/gas/ppc/future.d b/gas/testsuite/gas/ppc/future.d index 8301132..c0d9080 100644 --- a/gas/testsuite/gas/ppc/future.d +++ b/gas/testsuite/gas/ppc/future.d @@ -24,4 +24,5 @@ Disassembly of section \.text: .*: (5b 85 2a 7d|7d 2a 85 5b) stxvrll vs41,r10,r16 .*: (9a 8d 2a 7d|7d 2a 8d 9a) stxvprl vs40,r10,r17 .*: (da 95 6a 7d|7d 6a 95 da) stxvprll vs42,r10,r18 +.*: (c6 9d e9 f3|f3 e9 9d c6) xvrlw vs31,vs41,vs51 #pass diff --git a/gas/testsuite/gas/ppc/future.s b/gas/testsuite/gas/ppc/future.s index fe2cc45..4e782e8 100644 --- a/gas/testsuite/gas/ppc/future.s +++ b/gas/testsuite/gas/ppc/future.s @@ -16,3 +16,4 @@ _start: stxvrll 41,10,16 stxvprl 40,10,17 stxvprll 42,10,18 + xvrlw 31,41,51 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index e55bfe8..705b5d7 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -9372,6 +9372,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"xscvuxddp", XX2(60,360), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}}, {"xsnabsdp", XX2(60,361), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}}, {"xststdcdp", XX2(60,362), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}}, +{"xvrlw", XX3(60,184), XX3_MASK, PPCVSXF, PPCVLE, {XT6, XA6, XB6}}, {"xsnmsubmdp", XX3(60,185), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}}, {"xxleqv", XX3(60,186), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}}, {"xscvsxddp", XX2(60,376), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}}, |