gas/testsuite/

2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti.
	* gas/i386/x86-64-sse-noavx.s: Likewise.

	* gas/i386/sse-noavx.d: Updated.
	* gas/i386/x86-64-sse-noavx.d: Likewise.

opcodes/

2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
	* i386-tbl.h: Regenerated.

8 files changed, 31 insertions, 6 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d3913b0..b468eca 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,13 @@
 2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti.
+	* gas/i386/x86-64-sse-noavx.s: Likewise.
+
+	* gas/i386/sse-noavx.d: Updated.
+	* gas/i386/x86-64-sse-noavx.d: Likewise.
+
+2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* gas/i386/opts.s: Add tests for add, adc, and, cmp, or, sbb,
 	sub and xor.
 	* gas/i386/x86-64-opts.s: Likewise.
diff --git a/gas/testsuite/gas/i386/sse-noavx.d b/gas/testsuite/gas/i386/sse-noavx.d
index 518e9d5..dbf6224 100644
--- a/gas/testsuite/gas/i386/sse-noavx.d
+++ b/gas/testsuite/gas/i386/sse-noavx.d
@@ -16,9 +16,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 2c dc             	cvttps2pi %xmm4,%mm3
 [ 	]*[a-f0-9]+:	df 08                	fisttp \(%eax\)
 [ 	]*[a-f0-9]+:	dd 08                	fisttpll \(%eax\)
+[ 	]*[a-f0-9]+:	0f ae e8             	lfence 
 [ 	]*[a-f0-9]+:	0f f7 c7             	maskmovq %mm7,%mm0
+[ 	]*[a-f0-9]+:	0f ae f0             	mfence 
 [ 	]*[a-f0-9]+:	0f 01 c8             	monitor %eax,%ecx,%edx
 [ 	]*[a-f0-9]+:	f2 0f d6 c8          	movdq2q %xmm0,%mm1
+[ 	]*[a-f0-9]+:	0f c3 00             	movnti %eax,\(%eax\)
 [ 	]*[a-f0-9]+:	0f e7 10             	movntq %mm2,\(%eax\)
 [ 	]*[a-f0-9]+:	f3 0f d6 c8          	movq2dq %mm0,%xmm1
 [ 	]*[a-f0-9]+:	0f 01 c9             	mwait  %eax,%ecx
diff --git a/gas/testsuite/gas/i386/sse-noavx.s b/gas/testsuite/gas/i386/sse-noavx.s
index e0a5b54..900c9e5 100644
--- a/gas/testsuite/gas/i386/sse-noavx.s
+++ b/gas/testsuite/gas/i386/sse-noavx.s
@@ -11,9 +11,12 @@ _start:
  cvttps2pi	%xmm4,%mm3
  fisttp (%eax)
  fisttpll (%eax)
+ lfence
  maskmovq	%mm7,%mm0
+ mfence
  monitor
  movdq2q	%xmm0, %mm1
+ movnti %eax, (%eax)
  movntq		%mm2,(%eax)
  movq2dq	%mm0, %xmm1
  mwait
diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.d b/gas/testsuite/gas/i386/x86-64-sse-noavx.d
index 32846a6..5fa1fea 100644
--- a/gas/testsuite/gas/i386/x86-64-sse-noavx.d
+++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.d
@@ -17,9 +17,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 2c dc             	cvttps2pi %xmm4,%mm3
 [ 	]*[a-f0-9]+:	df 08                	fisttp \(%rax\)
 [ 	]*[a-f0-9]+:	dd 08                	fisttpll \(%rax\)
+[ 	]*[a-f0-9]+:	0f ae e8             	lfence 
 [ 	]*[a-f0-9]+:	0f f7 c7             	maskmovq %mm7,%mm0
+[ 	]*[a-f0-9]+:	0f ae f0             	mfence 
 [ 	]*[a-f0-9]+:	0f 01 c8             	monitor %rax,%rcx,%rdx
 [ 	]*[a-f0-9]+:	f2 0f d6 c8          	movdq2q %xmm0,%mm1
+[ 	]*[a-f0-9]+:	0f c3 00             	movnti %eax,\(%rax\)
 [ 	]*[a-f0-9]+:	0f e7 10             	movntq %mm2,\(%rax\)
 [ 	]*[a-f0-9]+:	f3 0f d6 c8          	movq2dq %mm0,%xmm1
 [ 	]*[a-f0-9]+:	0f 01 c9             	mwait  %rax,%rcx
diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.s b/gas/testsuite/gas/i386/x86-64-sse-noavx.s
index 08a8c22..69e7e96 100644
--- a/gas/testsuite/gas/i386/x86-64-sse-noavx.s
+++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.s
@@ -12,9 +12,12 @@ _start:
  cvttps2pi	%xmm4,%mm3
  fisttp (%rax)
  fisttpll (%rax)
+ lfence
  maskmovq	%mm7,%mm0
+ mfence
  monitor
  movdq2q	%xmm0, %mm1
+ movnti %eax, (%rax)
  movntq		%mm2,(%rax)
  movq2dq	%mm0, %xmm1
  mwait
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f8ddf48..f4631ef 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
 2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
+	* i386-tbl.h: Regenerated.
+
+2009-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
 	subB, xorB and cmpB.  Use EvS on addS, orS, adcS, sbbS, andS,
 	subS, xorS and cmpS.
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index e644a39..2666de0 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -909,10 +909,10 @@ fucompi, 1, 0xdfe8, None, 2, Cpu686, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
 
 // Pentium4 extensions.
 
-movnti, 2, 0xfc3, None, 2, CpuSSE2, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+movnti, 2, 0xfc3, None, 2, CpuSSE2, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoAVX, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
 clflush, 1, 0xfae, 0x7, 2, CpuClflush, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
-lfence, 0, 0xfae, 0xe8, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
-mfence, 0, 0xfae, 0xf0, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
+lfence, 0, 0xfae, 0xe8, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { 0 }
+mfence, 0, 0xfae, 0xf0, 2, CpuSSE2, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { 0 }
 // Processors that do not support PAUSE treat this opcode as a NOP instruction.
 pause, 0, 0xf390, None, 2, Cpu186, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
 
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 55991b2..d6e6851 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -6910,7 +6910,7 @@ const template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 
       1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
     { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	  0, 0, 0, 0, 0, 0 } },
@@ -6931,7 +6931,7 @@ const template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -6940,7 +6940,7 @@ const template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
 	  0, 0, 0, 0, 0, 0 } } } },