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| author | Jiong Wang <jiong.wang@arm.com> | 2016-10-11 11:24:44 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2016-10-11 11:24:44 +0100 |
| commit | 93562a343c26f67d2bd0e93cceb18a0a793087c2 (patch) | |
| tree | 7ff367ee5193dc3405fdee295f3a9659b210475b | |
| parent | f02cb058822459ea29a9fdaa928c2623df435908 (diff) | |
| download | binutils-93562a343c26f67d2bd0e93cceb18a0a793087c2.zip binutils-93562a343c26f67d2bd0e93cceb18a0a793087c2.tar.gz binutils-93562a343c26f67d2bd0e93cceb18a0a793087c2.tar.bz2 | |
[AArch64] PR target/20666, fix wrong encoding of new introduced BFC pseudo
opcode/
PR target/20666
* aarch64-asm.c (convert_bfc_to_bfm): Fix dest index.
gas/
* testsuite/gas/aarch64/alias-2.d: Update expected results.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/alias-2.d | 34 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.c | 2 |
4 files changed, 28 insertions, 18 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 4ecacf4..ca66672 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2016-10-11 Jiong Wang <jiong.wang@arm.com> + + PR target/20666 + * testsuite/gas/aarch64/alias-2.d: Update expected results. + 2016-10-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * testsuite/gas/cfi/cfi-common-1.d: Adjust regexps for mips64. diff --git a/gas/testsuite/gas/aarch64/alias-2.d b/gas/testsuite/gas/aarch64/alias-2.d index 64a94a4..45ddcf5 100644 --- a/gas/testsuite/gas/aarch64/alias-2.d +++ b/gas/testsuite/gas/aarch64/alias-2.d @@ -3,9 +3,9 @@ .*: file format .* -Disassembly of section \.text: +Disassembly of section .*: -0000000000000000 <.*>: +.* <.*>: [0-9a-f]+: b34107e0 bfxil x0, xzr, #1, #1 [0-9a-f]+: b3410420 bfxil x0, x1, #1, #1 [0-9a-f]+: b341043f bfxil xzr, x1, #1, #1 @@ -78,23 +78,23 @@ Disassembly of section \.text: [0-9a-f]+: b3613820 bfi x0, x1, #31, #15 [0-9a-f]+: b361383f bfi xzr, x1, #31, #15 [0-9a-f]+: b3613bff bfc xzr, #31, #15 - [0-9a-f]+: b34003e0 bfxil x0, xzr, #0, #1 + [0-9a-f]+: b37f03e0 bfc x0, #1, #1 + [0-9a-f]+: b37f03ff bfc xzr, #1, #1 + [0-9a-f]+: b37f1fe0 bfc x0, #1, #8 + [0-9a-f]+: b37f1fff bfc xzr, #1, #8 + [0-9a-f]+: b37f3be0 bfc x0, #1, #15 + [0-9a-f]+: b37f3bff bfc xzr, #1, #15 + [0-9a-f]+: b37003e0 bfc x0, #16, #1 + [0-9a-f]+: b37003ff bfc xzr, #16, #1 + [0-9a-f]+: b3701fe0 bfc x0, #16, #8 + [0-9a-f]+: b3701fff bfc xzr, #16, #8 + [0-9a-f]+: b3703be0 bfc x0, #16, #15 + [0-9a-f]+: b3703bff bfc xzr, #16, #15 + [0-9a-f]+: b36103e0 bfc x0, #31, #1 [0-9a-f]+: b36103ff bfc xzr, #31, #1 - [0-9a-f]+: b3401fe0 bfxil x0, xzr, #0, #8 - [0-9a-f]+: b3611fff bfc xzr, #31, #8 - [0-9a-f]+: b3403be0 bfxil x0, xzr, #0, #15 - [0-9a-f]+: b3613bff bfc xzr, #31, #15 - [0-9a-f]+: b34003e0 bfxil x0, xzr, #0, #1 - [0-9a-f]+: b36103ff bfc xzr, #31, #1 - [0-9a-f]+: b3401fe0 bfxil x0, xzr, #0, #8 - [0-9a-f]+: b3611fff bfc xzr, #31, #8 - [0-9a-f]+: b3403be0 bfxil x0, xzr, #0, #15 - [0-9a-f]+: b3613bff bfc xzr, #31, #15 - [0-9a-f]+: b34003e0 bfxil x0, xzr, #0, #1 - [0-9a-f]+: b36103ff bfc xzr, #31, #1 - [0-9a-f]+: b3401fe0 bfxil x0, xzr, #0, #8 + [0-9a-f]+: b3611fe0 bfc x0, #31, #8 [0-9a-f]+: b3611fff bfc xzr, #31, #8 - [0-9a-f]+: b3403be0 bfxil x0, xzr, #0, #15 + [0-9a-f]+: b3613be0 bfc x0, #31, #15 [0-9a-f]+: b3613bff bfc xzr, #31, #15 [0-9a-f]+: dac00fe0 rev x0, xzr [0-9a-f]+: dac00c20 rev x0, x1 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 65cf0d7..3ac9c3f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-10-11 Jiong Wang <jiong.wang@arm.com> + + PR target/20666 + * aarch64-asm.c (convert_bfc_to_bfm): Fix dest index. + 2016-10-07 Jiong Wang <jiong.wang@arm.com> PR target/20667 diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index dd2859b..34be794 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1539,7 +1539,7 @@ convert_bfc_to_bfm (aarch64_inst *inst) /* Insert XZR. */ copy_operand_info (inst, 3, 2); copy_operand_info (inst, 2, 1); - copy_operand_info (inst, 2, 0); + copy_operand_info (inst, 0, 0); inst->operands[1].reg.regno = 0x1f; /* Convert the immedate operand. */ |