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author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-06-25 11:25:26 +0100 |
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committer | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-06-25 13:38:01 +0100 |
commit | 8e018c070ce41fe83f09b4fde8c2b2d9ad473e25 (patch) | |
tree | 167eec79486fefbbc950c989dae786699c285bf3 | |
parent | 8c438c8d083f84eb59eb465020e5b7a923afe1ba (diff) | |
download | binutils-8e018c070ce41fe83f09b4fde8c2b2d9ad473e25.zip binutils-8e018c070ce41fe83f09b4fde8c2b2d9ad473e25.tar.gz binutils-8e018c070ce41fe83f09b4fde8c2b2d9ad473e25.tar.bz2 |
aarch64: Enable mandatory feature bits for v9.4-A.
This patch fixes the mandatory feature bits in v9.4-a architectures,
by enabling FEAT_SVE2p1 for Armv9.4-A architecture by default.
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-1-bad.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-1.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-2-bad.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-2-bad.l | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2p1-nosve2.s | 1 | ||||
-rw-r--r-- | include/opcode/aarch64.h | 3 |
6 files changed, 11 insertions, 3 deletions
diff --git a/gas/testsuite/gas/aarch64/sve2p1-1-bad.d b/gas/testsuite/gas/aarch64/sve2p1-1-bad.d index a2ca49e..c28cdc7 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-1-bad.d +++ b/gas/testsuite/gas/aarch64/sve2p1-1-bad.d @@ -1,4 +1,4 @@ #name: Illegal test of SVE2.1 min max instructions. -#as: -march=armv9.4-a +#as: -march=armv9.3-a #source: sve2p1-1.s #error_output: sve2p1-1-bad.l diff --git a/gas/testsuite/gas/aarch64/sve2p1-1.d b/gas/testsuite/gas/aarch64/sve2p1-1.d index b93920c..f562985 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-1.d +++ b/gas/testsuite/gas/aarch64/sve2p1-1.d @@ -1,5 +1,5 @@ #name: Test of SVE2.1 instructions -#as: -march=armv9.4-a+sve2p1 +#as: -march=armv9.4-a #objdump: -dr [^:]+: file format .* diff --git a/gas/testsuite/gas/aarch64/sve2p1-2-bad.d b/gas/testsuite/gas/aarch64/sve2p1-2-bad.d new file mode 100644 index 0000000..4d58f4b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2p1-2-bad.d @@ -0,0 +1,4 @@ +#name: Illegal test of SVE2.1 instructions. +#as: -march=armv9.4-a+nosve2 +#source: sve2p1-nosve2.s +#error_output: sve2p1-2-bad.l diff --git a/gas/testsuite/gas/aarch64/sve2p1-2-bad.l b/gas/testsuite/gas/aarch64/sve2p1-2-bad.l new file mode 100644 index 0000000..1e16026 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2p1-2-bad.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*: Error: selected processor does not support `addqv v0.16b,p0,z16.b' diff --git a/gas/testsuite/gas/aarch64/sve2p1-nosve2.s b/gas/testsuite/gas/aarch64/sve2p1-nosve2.s new file mode 100644 index 0000000..7f457ea --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2p1-nosve2.s @@ -0,0 +1 @@ +addqv v0.16b, p0, z16.b diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 19dadaa..3410a76 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -359,7 +359,8 @@ enum aarch64_feature_bit { #define AARCH64_ARCH_V9_1A_FEATURES(X) AARCH64_ARCH_V8_6A_FEATURES (X) #define AARCH64_ARCH_V9_2A_FEATURES(X) AARCH64_ARCH_V8_7A_FEATURES (X) #define AARCH64_ARCH_V9_3A_FEATURES(X) AARCH64_ARCH_V8_8A_FEATURES (X) -#define AARCH64_ARCH_V9_4A_FEATURES(X) AARCH64_ARCH_V8_9A_FEATURES (X) +#define AARCH64_ARCH_V9_4A_FEATURES(X) (AARCH64_ARCH_V8_9A_FEATURES (X) \ + | AARCH64_FEATBIT (X, SVE2p1)) /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8A(X) (AARCH64_FEATBIT (X, V8) \ |