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authorRichard Earnshaw <richard.earnshaw@arm.com>2011-11-23 10:50:53 +0000
committerRichard Earnshaw <richard.earnshaw@arm.com>2011-11-23 10:50:53 +0000
commit837b3435bc80eade8aa655030173560af3be609c (patch)
treeb9cd934c885a4916e6de4c9fc7b9caeb41ec224a
parent67be10ef8faa83b27aee2f668b8aec6402589d52 (diff)
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2011-11-23 Thomas Klein <th.r.klein@web.de>
* config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV with two low register at arch v4t or v5t when assember using unified syntax.
-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-arm.c5
2 files changed, 11 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index e385881..9348a20 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2011-11-23 Thomas Klein <th.r.klein@web.de>
+
+ * config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
+ with two low register at arch v4t or v5t when assember using
+ unified syntax.
+
2011-11-21 DJ Delorie <dj@redhat.com>
* config/rl78-defs.h (rl78_error): Add "const".
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index e8040c3..bf44228 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -10913,6 +10913,11 @@ do_t_mov_cmp (void)
switch (inst.instruction)
{
case T_MNEM_mov:
+ /* In v4t or v5t a move of two lowregs produces unpredictable
+ results. Don't allow this.*/
+ constraint (low_regs && !ARM_CPU_HAS_FEATURE (selected_cpu,
+ arm_ext_v6),"MOV Rd, Rs with two low registers is not "
+ "permitted on this architecture");
inst.instruction = T_OPCODE_MOV_HR;
inst.instruction |= (Rn & 0x8) << 4;
inst.instruction |= (Rn & 0x7);