diff options
author | Alan Modra <amodra@gmail.com> | 2008-05-07 14:46:44 +0000 |
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committer | Alan Modra <amodra@gmail.com> | 2008-05-07 14:46:44 +0000 |
commit | 8374f9d4b51c7bb4464875756b1a4b4e9ce742f0 (patch) | |
tree | 9be50c50e3c11f9a155a9f243921b8d79bf67ae7 | |
parent | 8c0848b5090141528fc24baa8f869252e63b8598 (diff) | |
download | binutils-8374f9d4b51c7bb4464875756b1a4b4e9ce742f0.zip binutils-8374f9d4b51c7bb4464875756b1a4b4e9ce742f0.tar.gz binutils-8374f9d4b51c7bb4464875756b1a4b4e9ce742f0.tar.bz2 |
bfd/
* elf32-spu.c (spu_elf_special_sections): Add "._ea".
(spu_elf_relocate_section): Handle relocations against symbols
defined in ._ea specially.
binutils/
* embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol,
and if present, put image in ".data.speelf". Put program handle
in ".data.spehandle".
ld/emulparams/
* elf32_spu.sh (OTHER_SECTIONS): Add "._ea".
* elf32ppc.sh: If building with spu support, put ".data.spehandle"
sections at the start of ".data" and provide a symbol to locate
the directory of embedded spe programs.
ld/testsuite/
* ld-spu/ear.s: Align various sections.
* ld-spu/embed.rd: Update.
-rw-r--r-- | bfd/ChangeLog | 6 | ||||
-rw-r--r-- | bfd/elf32-spu.c | 37 | ||||
-rw-r--r-- | binutils/ChangeLog | 6 | ||||
-rw-r--r-- | binutils/embedspu.sh | 12 | ||||
-rw-r--r-- | ld/ChangeLog | 7 | ||||
-rw-r--r-- | ld/emulparams/elf32_spu.sh | 3 | ||||
-rw-r--r-- | ld/emulparams/elf32ppc.sh | 8 | ||||
-rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | ld/testsuite/ld-spu/ear.s | 3 | ||||
-rw-r--r-- | ld/testsuite/ld-spu/embed.rd | 24 |
10 files changed, 86 insertions, 25 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index bc5e139..0a8e250 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,9 @@ +2008-05-08 Alan Modra <amodra@bigpond.net.au> + + * elf32-spu.c (spu_elf_special_sections): Add "._ea". + (spu_elf_relocate_section): Handle relocations against symbols + defined in ._ea specially. + 2008-05-03 Daniel Jacobowitz <dan@codesourcery.com> * elf32-arm.c (elf32_arm_symbian_link_hash_table_create): Use diff --git a/bfd/elf32-spu.c b/bfd/elf32-spu.c index 82da03f..420193b 100644 --- a/bfd/elf32-spu.c +++ b/bfd/elf32-spu.c @@ -91,6 +91,7 @@ static reloc_howto_type elf_howto_table[] = { }; static struct bfd_elf_special_section const spu_elf_special_sections[] = { + { "._ea", 4, 0, SHT_PROGBITS, SHF_WRITE }, { ".toe", 4, 0, SHT_NOBITS, SHF_ALLOC }, { NULL, 0, 0, 0, 0 } }; @@ -3887,8 +3888,10 @@ spu_elf_relocate_section (bfd *output_bfd, struct elf_link_hash_entry **sym_hashes; Elf_Internal_Rela *rel, *relend; struct spu_link_hash_table *htab; + asection *ea = bfd_get_section_by_name (output_bfd, "._ea"); int ret = TRUE; bfd_boolean emit_these_relocs = FALSE; + bfd_boolean is_ea; bfd_boolean stubs; htab = spu_hash_table (info); @@ -3903,7 +3906,7 @@ spu_elf_relocate_section (bfd *output_bfd, { int r_type; reloc_howto_type *howto; - unsigned long r_symndx; + unsigned int r_symndx; Elf_Internal_Sym *sym; asection *sec; struct elf_link_hash_entry *h; @@ -3916,12 +3919,6 @@ spu_elf_relocate_section (bfd *output_bfd, r_symndx = ELF32_R_SYM (rel->r_info); r_type = ELF32_R_TYPE (rel->r_info); - if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64) - { - emit_these_relocs = TRUE; - continue; - } - howto = elf_howto_table + r_type; unresolved_reloc = FALSE; warned = FALSE; @@ -3958,6 +3955,31 @@ spu_elf_relocate_section (bfd *output_bfd, if (info->relocatable) continue; + is_ea = (ea != NULL + && sec != NULL + && sec->output_section == ea); + if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64) + { + if (is_ea) + { + /* ._ea is a special section that isn't allocated in SPU + memory, but rather occupies space in PPU memory as + part of an embedded ELF image. If this reloc is + against a symbol defined in ._ea, then transform the + reloc into an equivalent one without a symbol + relative to the start of the ELF image. */ + rel->r_addend += (relocation + - ea->vma + + elf_section_data (ea)->this_hdr.sh_offset); + rel->r_info = ELF32_R_INFO (0, r_type); + } + emit_these_relocs = TRUE; + continue; + } + + if (is_ea) + unresolved_reloc = TRUE; + if (unresolved_reloc) { (*_bfd_error_handler) @@ -4059,7 +4081,6 @@ spu_elf_relocate_section (bfd *output_bfd, if (ret && emit_these_relocs - && !info->relocatable && !info->emitrelocations) { Elf_Internal_Rela *wrel; diff --git a/binutils/ChangeLog b/binutils/ChangeLog index a45b6e0..9ee4875 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,9 @@ +2008-05-08 Alan Modra <amodra@bigpond.net.au> + + * embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol, + and if present, put image in ".data.speelf". Put program handle + in ".data.spehandle". + 2008-05-01 Nick Clifton <nickc@redhat.com> * readelf.c (print_symbol): Add code to display non-printing diff --git a/binutils/embedspu.sh b/binutils/embedspu.sh index d438ed9..f44d665 100644 --- a/binutils/embedspu.sh +++ b/binutils/embedspu.sh @@ -1,7 +1,7 @@ #! /bin/sh # Embed an SPU ELF executable into a PowerPC object file. # -# Copyright 2006, 2007 Free Software Foundation, Inc. +# Copyright 2006, 2007, 2008 Free Software Foundation, Inc. # # This file is part of GNU Binutils. # @@ -138,7 +138,7 @@ main () # sections. # Find all _EAR_ symbols in .toe using readelf, sort by address, and # write the address of the corresponding PowerPC symbol in a table - # built in .data.spetoe. For _EAE_ symbols not in .toe, create + # built in .data.spetoe. For _EAR_ symbols not in .toe, create # .reloc commands to relocate their location directly. # 3. Look for R_SPU_PPU32 and R_SPU_PPU64 relocations in the SPU ELF image # and create .reloc commands for them. @@ -202,6 +202,7 @@ $3 ~ /R_SPU_PPU/ { \ print "#else"; \ print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + (substr($3, 10) == "64" ? 4 : 0)", R_PPC_ADDR32, " ($5 != "" ? $5 "+0x" $7 : "__speelf__ + 0x" $4); \ print "#endif"; \ + if (!has_ea && $5 == "") { print "#define HAS_EA 1"; has_ea = 1; }; \ if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \ } \ $3 ~ /unrecognized:/ { \ @@ -210,10 +211,13 @@ $3 ~ /unrecognized:/ { \ print "#else"; \ print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + ($4 == "f" ? 4 : 0)", R_PPC_ADDR32, " ($6 != "" ? $6 "+0x" $8 : "__speelf__ + 0x" $5); \ print "#endif"; \ + if (!has_ea && $5 == "") { print "#define HAS_EA 1"; has_ea = 1; }; \ if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \ } \ '` -#if defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__)) +#ifdef HAS_EA + .section .data.speelf,"aw",@progbits +#elif defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__)) .section .data.rel.ro.speelf,"a",@progbits #else .section .rodata.speelf,"a",@progbits @@ -222,7 +226,7 @@ $3 ~ /unrecognized:/ { \ __speelf__: .incbin "${INFILE}" - .section .data,"aw",@progbits + .section .data.spehandle,"aw",@progbits .globl ${SYMBOL} .type ${SYMBOL}, @object # fill in a struct spe_program_handle diff --git a/ld/ChangeLog b/ld/ChangeLog index 0873961..87679e9 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,5 +1,12 @@ 2008-05-08 Alan Modra <amodra@bigpond.net.au> + * elf32_spu.sh (OTHER_SECTIONS): Add "._ea". + * elf32ppc.sh: If building with spu support, put ".data.spehandle" + sections at the start of ".data" and provide a symbol to locate + the directory of embedded spe programs. + +2008-05-08 Alan Modra <amodra@bigpond.net.au> + * ldexp.c (exp_print_token): Add ABSOLUTE, MIN_K, ASSERT_K. Correct MAX_K. (fold_binary <SEGMENT_START>): Set expld.result.section to diff --git a/ld/emulparams/elf32_spu.sh b/ld/emulparams/elf32_spu.sh index 4af608c..52a3e7b 100644 --- a/ld/emulparams/elf32_spu.sh +++ b/ld/emulparams/elf32_spu.sh @@ -17,4 +17,5 @@ EMBEDDED=true MAXPAGESIZE=0x80 DATA_ADDR="ALIGN(${MAXPAGESIZE})" OTHER_BSS_SECTIONS=".toe ALIGN(128) : { *(.toe) } = 0" -OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) }" +OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) } + ._ea 0 : { KEEP(*(._ea)) }" diff --git a/ld/emulparams/elf32ppc.sh b/ld/emulparams/elf32ppc.sh index 68962d7..7349993 100644 --- a/ld/emulparams/elf32ppc.sh +++ b/ld/emulparams/elf32ppc.sh @@ -14,3 +14,11 @@ PLT=".plt ${RELOCATING-0} : SPECIAL { *(.plt) }" GOTPLT="${PLT}" OTHER_TEXT_SECTIONS="*(.glink)" EXTRA_EM_FILE=ppc32elf +if grep -q 'ld_elf32_spu_emulation' ldemul-list.h; then +# crt1.o defines data_start and __data_start. Keep them first. +# Next put all the .data.spehandle sections, with a trailing zero word. + DATA_START_SYMBOLS="${RELOCATING+*crt1.o(.data .data.* .gnu.linkonce.d.*) + PROVIDE (__spe_handle = .); + *(.data.spehandle) + . += 4 * (DEFINED (__spe_handle) || . != 0);}" +fi diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index ddbd75d..5383fbd 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2008-05-08 Alan Modra <amodra@bigpond.net.au> + + * ld-spu/ear.s: Align various sections. + * ld-spu/embed.rd: Update. + 2008-05-05 Alan Modra <amodra@bigpond.net.au> PR 6473 diff --git a/ld/testsuite/ld-spu/ear.s b/ld/testsuite/ld-spu/ear.s index ba0be05..724a525 100644 --- a/ld/testsuite/ld-spu/ear.s +++ b/ld/testsuite/ld-spu/ear.s @@ -5,6 +5,7 @@ _start: #test old-style toe _EAR_ syms .section .toe,"a",@nobits + .p2align 4 _EAR_: .space 16 _EAR_bar: @@ -12,6 +13,7 @@ _EAR_bar: #test new-style _EAR_ syms .data + .p2align 4 _EAR_main: .space 16 @@ -21,5 +23,6 @@ _EAR_foo: .space 16 .section .data.blah,"aw",@progbits + .p2align 4 _EAR_blah: .space 16 diff --git a/ld/testsuite/ld-spu/embed.rd b/ld/testsuite/ld-spu/embed.rd index 0ac34da..4fcfe2a 100644 --- a/ld/testsuite/ld-spu/embed.rd +++ b/ld/testsuite/ld-spu/embed.rd @@ -1,16 +1,16 @@ Relocation section '\.rela\.rodata\.speelf' at .* contains 3 entries: - Offset Info Type Sym\. Value Symbol's Name \+ Addend -00000184 00000601 R_PPC_ADDR32 00000000 main \+ 0 -000001a4 00000901 R_PPC_ADDR32 00000000 foo \+ 0 -000001b4 00000701 R_PPC_ADDR32 00000000 blah \+ 0 - -Relocation section '\.rela\.data' at .* contains 2 entries: - Offset Info Type Sym\. Value Symbol's Name \+ Addend -00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0 -00000008 00000401 R_PPC_ADDR32 00000000 \.data\.spetoe \+ 0 + Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend +0+184 .* R_PPC_ADDR32 +0+0 +main \+ 0 +0+1a4 .* R_PPC_ADDR32 +0+0 +foo \+ 0 +0+1b4 .* R_PPC_ADDR32 +0+0 +blah \+ 0 Relocation section '\.rela\.data\.spetoe' at .* contains 2 entries: - Offset Info Type Sym\. Value Symbol's Name \+ Addend -00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0 -00000014 00000a01 R_PPC_ADDR32 00000000 bar \+ 0 + Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend +0+004 .* R_PPC_ADDR32 +0+0 +\.rodata\.speelf \+ 0 +0+014 .* R_PPC_ADDR32 +0+0 +bar \+ 0 + +Relocation section '\.rela\.data\.spehandle' at .* contains 2 entries: + Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend +0+004 .* R_PPC_ADDR32 +0+0 +\.rodata\.speelf \+ 0 +0+008 .* R_PPC_ADDR32 +0+0 +\.data\.spetoe \+ 0 |