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| author | WANG Xuerui <git@xen0n.name> | 2023-06-30 00:35:03 +0800 |
|---|---|---|
| committer | liuzhensong <liuzhensong@loongson.cn> | 2023-06-30 10:18:02 +0800 |
| commit | 6ad6615a79843aa224710a70a33fd15777f74f49 (patch) | |
| tree | 3627e8c882ba17c0c228bdd55cbbf0c673f6a295 | |
| parent | 8b6fefaddeec839e6b1121336ba5e6696491d91f (diff) | |
| download | binutils-6ad6615a79843aa224710a70a33fd15777f74f49.zip binutils-6ad6615a79843aa224710a70a33fd15777f74f49.tar.gz binutils-6ad6615a79843aa224710a70a33fd15777f74f49.tar.bz2 | |
opcodes/loongarch: print unrecognized insn words with the .word directive
For better round-trip fidelity and readability in general.
gas/ChangeLog:
* testsuite/gas/loongarch/uleb128.d: Update test case.
* testsuite/gas/loongarch/raw-insn.d: New test.
* testsuite/gas/loongarch/raw-insn.s: Likewise.
opcodes/ChangeLog:
* loongarch-dis.c (disassemble_one): Print ".word" if !opc.
Signed-off-by: WANG Xuerui <git@xen0n.name>
| -rw-r--r-- | gas/testsuite/gas/loongarch/raw-insn.d | 11 | ||||
| -rw-r--r-- | gas/testsuite/gas/loongarch/raw-insn.s | 7 | ||||
| -rw-r--r-- | gas/testsuite/gas/loongarch/uleb128.d | 20 | ||||
| -rw-r--r-- | opcodes/loongarch-dis.c | 1 |
4 files changed, 29 insertions, 10 deletions
diff --git a/gas/testsuite/gas/loongarch/raw-insn.d b/gas/testsuite/gas/loongarch/raw-insn.d new file mode 100644 index 0000000..64980e4 --- /dev/null +++ b/gas/testsuite/gas/loongarch/raw-insn.d @@ -0,0 +1,11 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+00000000[ ]+.word[ ]+0x00000000 +[ ]+4:[ ]+feedf00d[ ]+.word[ ]+0xfeedf00d diff --git a/gas/testsuite/gas/loongarch/raw-insn.s b/gas/testsuite/gas/loongarch/raw-insn.s new file mode 100644 index 0000000..528b152 --- /dev/null +++ b/gas/testsuite/gas/loongarch/raw-insn.s @@ -0,0 +1,7 @@ +target: + .word 0 + # Given how the LoongArch encoding space is apparently centrally- + # managed and sequentially allocated in chunks of prefixes, it is + # highly unlikely this would become a valid LoongArch instruction in + # the foreseeable future. + .word 0xfeedf00d diff --git a/gas/testsuite/gas/loongarch/uleb128.d b/gas/testsuite/gas/loongarch/uleb128.d index df66587..ad67ded 100644 --- a/gas/testsuite/gas/loongarch/uleb128.d +++ b/gas/testsuite/gas/loongarch/uleb128.d @@ -8,29 +8,29 @@ Disassembly of section .data: 00000000.* <L1-0x5>: -[ ]+0:[ ]+80030201[ ]+0x80030201 +[ ]+0:[ ]+80030201[ ]+\.word[ ]+0x80030201 [ ]+3:[ ]+R_LARCH_ADD_ULEB128[ ]+L2 [ ]+3:[ ]+R_LARCH_SUB_ULEB128[ ]+L1 [ ]+\.\.\. 0000000000000005[ ]+<L1>: [ ]+\.\.\. -[ ]+81:[ ]+ff040000[ ]+0xff040000 +[ ]+81:[ ]+ff040000[ ]+\.word[ ]+0xff040000 [ ]+85:[ ]+cacop[ ]+0x1f,[ ]+\$t3,[ ]+1 0000000000000086[ ]+<L2>: -[ ]+86:[ ]+07060005[ ]+0x07060005 -[ ]+8a:[ ]+0x00008080 +[ ]+86:[ ]+07060005[ ]+\.word[ ]+0x07060005 +[ ]+8a:[ ]+\.word[ ]+0x00008080 [ ]+8a:[ ]+R_LARCH_ADD_ULEB128[ ]+L4 [ ]+8a:[ ]+R_LARCH_SUB_ULEB128[ ]+L3 000000000000008d[ ]+<L3>: [ ]+\.\.\. -[ ]+4089:[ ]+ff080000[ ]+0xff080000 -[ ]+408d:[ ]+0x09ffffff +[ ]+4089:[ ]+ff080000[ ]+\.word[ ]+0xff080000 +[ ]+408d:[ ]+\.word[ ]+0x09ffffff 0000000000004090[ ]+<L4>: -[ ]+4090:[ ]+09090909[ ]+0x09090909 -[ ]+4094:[ ]+09090909[ ]+0x09090909 -[ ]+4098:[ ]+09090909[ ]+0x09090909 -[ ]+409c:[ ]+09090909[ ]+0x09090909 +[ ]+4090:[ ]+09090909[ ]+\.word[ ]+0x09090909 +[ ]+4094:[ ]+09090909[ ]+\.word[ ]+0x09090909 +[ ]+4098:[ ]+09090909[ ]+\.word[ ]+0x09090909 +[ ]+409c:[ ]+09090909[ ]+\.word[ ]+0x09090909 diff --git a/opcodes/loongarch-dis.c b/opcodes/loongarch-dis.c index c45c4fc..8d72519 100644 --- a/opcodes/loongarch-dis.c +++ b/opcodes/loongarch-dis.c @@ -259,6 +259,7 @@ disassemble_one (insn_t insn, struct disassemble_info *info) if (!opc) { info->insn_type = dis_noninsn; + info->fprintf_styled_func (info->stream, dis_style_assembler_directive, ".word\t\t"); info->fprintf_styled_func (info->stream, dis_style_immediate, "0x%08x", insn); return; } |