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| author | Cooper Qu <cooper.qu@linux.alibaba.com> | 2020-09-07 17:25:14 +0800 |
|---|---|---|
| committer | Lifang Xia <lifang_xia@c-sky.com> | 2020-09-09 19:26:34 +0800 |
| commit | 6a1ed9106f4f937eddc194915d6e3ec4ecc79f20 (patch) | |
| tree | d9fdf754703e4e0d810f0a4562ee803ec85a7180 | |
| parent | a2061b9f29ea1ae8d40d5627bb8e704fa9e95a67 (diff) | |
| download | binutils-6a1ed9106f4f937eddc194915d6e3ec4ecc79f20.zip binutils-6a1ed9106f4f937eddc194915d6e3ec4ecc79f20.tar.gz binutils-6a1ed9106f4f937eddc194915d6e3ec4ecc79f20.tar.bz2 | |
CSKY: Change mvtc and mulsw's ISA flag.
gas/
* config/tc-csky.c (CSKYV2_ISA_DSP): CSKY_ISA_DSPE60.
(CSKY_ISA_860): Likewise.
include/
* opcode/csky.h (CSKY_ISA_DSPE60): Define.
opcodes/
* csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's
ISA flag.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-csky.c | 4 | ||||
| -rw-r--r-- | include/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/csky.h | 1 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/csky-opc.h | 4 |
6 files changed, 19 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 897d42b..94c3bbb 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> + * config/tc-csky.c (CSKYV2_ISA_DSP): CSKY_ISA_DSPE60. + (CSKY_ISA_860): Likewise. + +2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> + * config/tc-csky.c (float_abi): New. (md_longopts): Add mfloat-abi. (struct sky_option_value_table): New. diff --git a/gas/config/tc-csky.c b/gas/config/tc-csky.c index 25f7713..2d57bd2 100644 --- a/gas/config/tc-csky.c +++ b/gas/config/tc-csky.c @@ -611,7 +611,7 @@ const struct csky_cpu_info csky_cpus[] = /* CK801 series. */ #define CSKY_ISA_801 CSKYV2_ISA_E1 -#define CSKYV2_ISA_DSP (CSKY_ISA_DSP | CSKY_ISA_DSP_1E2) +#define CSKYV2_ISA_DSP (CSKY_ISA_DSP | CSKY_ISA_DSP_1E2 | CSKY_ISA_DSPE60) {"ck801", CSKY_ARCH_801, CSKY_ISA_801}, {"ck801t", CSKY_ARCH_801, CSKY_ISA_801 | CSKY_ISA_TRUST}, @@ -708,7 +708,7 @@ const struct csky_cpu_info csky_cpus[] = {"ck810ftv", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_VDSP | CSKY_ISA_FLOAT_810 | CSKY_ISA_TRUST}, /* CK860 Series. */ -#define CSKY_ISA_860 (CSKY_ISA_810 | CSKYV2_ISA_10E60 | CSKYV2_ISA_3E3R3) +#define CSKY_ISA_860 (CSKY_ISA_810 | CSKYV2_ISA_10E60 | CSKYV2_ISA_3E3R3 | CSKY_ISA_DSPE60) #define CSKY_ISA_860F (CSKY_ISA_860 | CSKY_ISA_FLOAT_7E60) {"ck860", CSKY_ARCH_860, CSKY_ISA_860}, {"ck860f", CSKY_ARCH_860, CSKY_ISA_860F}, diff --git a/include/ChangeLog b/include/ChangeLog index 33998eb..28779bc 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,9 @@ 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> + * opcode/csky.h (CSKY_ISA_DSPE60): Define. + +2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> + * opcode/csky.h (CSKY_ISA_FLOAT_7E60): Define. 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com> diff --git a/include/opcode/csky.h b/include/opcode/csky.h index 1ad7f58..4214543 100644 --- a/include/opcode/csky.h +++ b/include/opcode/csky.h @@ -47,6 +47,7 @@ #define CSKY_ISA_DSP (1L << 20) #define CSKY_ISA_DSP_1E2 (1L << 21) #define CSKY_ISA_DSP_ENHANCE (1L << 22) +#define CSKY_ISA_DSPE60 (1L << 23) /* Base float instruction (803f & 810f). */ #define CSKY_ISA_FLOAT_E1 (1L << 25) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4f416bf..bd5a284 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> + * csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's + ISA flag. + +2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> + * csky-dis.c (csky_output_operand): Add handlers for OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH diff --git a/opcodes/csky-opc.h b/opcodes/csky-opc.h index fac30ae..5a6068c 100644 --- a/opcodes/csky-opc.h +++ b/opcodes/csky-opc.h @@ -2687,7 +2687,7 @@ const struct csky_opcode csky_v2_opcodes[] = CSKY_ISA_DSP), OP32 ("mvtc", OPCODE_INFO0 (0xc4009a00), - CSKY_ISA_DSP), + CSKY_ISA_DSPE60), OP32 ("mfhi", OPCODE_INFO1 (0xc4009c20, (0_4, AREG, OPRND_SHIFT_0_BIT)), @@ -4119,7 +4119,7 @@ const struct csky_opcode csky_v2_opcodes[] = OPCODE_INFO2 (0xc4009420, (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT), (21_25, AREG, OPRND_SHIFT_0_BIT)), - CSKY_ISA_DSP), + CSKY_ISA_DSPE60), OP16_OP32 ("ld.b", SOPCODE_INFO2 (0x8000, (5_7, GREG0_7, OPRND_SHIFT_0_BIT), |