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authorJan Beulich <jbeulich@suse.com>2024-11-18 11:45:50 +0100
committerJan Beulich <jbeulich@suse.com>2024-11-18 11:45:50 +0100
commit497ee27a74891575c51a5857f23cdaac30f513f6 (patch)
treeceeb3b8115a349c1b52c3bb99e97cabbdec71b33
parent3c17b69fa1ac3b5c820caf5431532aa79e1e28cf (diff)
downloadbinutils-497ee27a74891575c51a5857f23cdaac30f513f6.zip
binutils-497ee27a74891575c51a5857f23cdaac30f513f6.tar.gz
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x86: VP2INTERSECT{D,Q} have mask register destination group
Much like AVX512-{4FMAPS,4VNNIW} have a constraint on their register source, there's a constraint (need to be even) on the destination register here. Adjust "good" test cases accordingly, and add a new test case to check the warning.
-rw-r--r--gas/config/tc-i386.c6
-rw-r--r--gas/testsuite/gas/i386/arch-15.d2
-rw-r--r--gas/testsuite/gas/i386/arch-15.s2
-rw-r--r--gas/testsuite/gas/i386/i386.exp1
-rw-r--r--gas/testsuite/gas/i386/vp2intersect-intel.d72
-rw-r--r--gas/testsuite/gas/i386/vp2intersect-inval-bcast.s24
-rw-r--r--gas/testsuite/gas/i386/vp2intersect-warn.l31
-rw-r--r--gas/testsuite/gas/i386/vp2intersect-warn.s11
-rw-r--r--gas/testsuite/gas/i386/vp2intersect.d72
-rw-r--r--gas/testsuite/gas/i386/vp2intersect.s72
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-5.d2
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-5.s2
-rw-r--r--gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d72
-rw-r--r--gas/testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s24
-rw-r--r--gas/testsuite/gas/i386/x86-64-vp2intersect.d72
-rw-r--r--gas/testsuite/gas/i386/x86-64-vp2intersect.s72
-rw-r--r--opcodes/i386-opc.tbl2
-rw-r--r--opcodes/i386-tbl.h4
18 files changed, 296 insertions, 247 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 975f85a..40e3b57 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -10719,6 +10719,12 @@ process_operands (void)
extra = 3;
break;
+ case RegMask:
+ /* AVX512-VP2INTERSECT operand 3: N must be a multiple of 2. */
+ op = 2;
+ extra = 1;
+ break;
+
default:
abort ();
}
diff --git a/gas/testsuite/gas/i386/arch-15.d b/gas/testsuite/gas/i386/arch-15.d
index 33de12a..76e2372 100644
--- a/gas/testsuite/gas/i386/arch-15.d
+++ b/gas/testsuite/gas/i386/arch-15.d
@@ -9,5 +9,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+:[ ]*c4 e2 59 50 d2[ ]*\{vex\} vpdpbusd %xmm2,%xmm4,%xmm2
[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d1[ ]*vp2intersectd %zmm1,%zmm2,%k2
#pass
diff --git a/gas/testsuite/gas/i386/arch-15.s b/gas/testsuite/gas/i386/arch-15.s
index e3b70e5..e21dee0 100644
--- a/gas/testsuite/gas/i386/arch-15.s
+++ b/gas/testsuite/gas/i386/arch-15.s
@@ -4,4 +4,4 @@
{vex} vpdpbusd %xmm2, %xmm4, %xmm2 #AVX_VNNI
movdiri %eax, (%ecx) #MOVDIRI
movdir64b (%ecx), %eax #MOVDIR64B
- vp2intersectd %zmm1, %zmm2, %k3 #AVX512_VP2INTERSECT
+ vp2intersectd %zmm1, %zmm2, %k2 #AVX512_VP2INTERSECT
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index b7afb29..23729ef 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -577,6 +577,7 @@ if [gas_32_check] then {
run_dump_test "vp2intersect"
run_dump_test "vp2intersect-intel"
run_list_test "vp2intersect-inval-bcast"
+ run_list_test "vp2intersect-warn" "-aln"
run_dump_test "keylocker"
run_dump_test "keylocker-intel"
run_dump_test "avx512_fp16"
diff --git a/gas/testsuite/gas/i386/vp2intersect-intel.d b/gas/testsuite/gas/i386/vp2intersect-intel.d
index 40041e2..9274188 100644
--- a/gas/testsuite/gas/i386/vp2intersect-intel.d
+++ b/gas/testsuite/gas/i386/vp2intersect-intel.d
@@ -8,40 +8,40 @@
Disassembly of section \.text:
00000000 <\.text>:
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd k3,zmm2,ZMMWORD PTR \[eax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd k3,zmm2,DWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd k3,ymm2,YMMWORD PTR \[eax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd k3,ymm2,DWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd k3,xmm2,XMMWORD PTR \[eax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd k3,xmm2,DWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq k3,zmm2,ZMMWORD PTR \[eax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq k3,zmm2,QWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq k3,ymm2,YMMWORD PTR \[eax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq k3,ymm2,QWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq k3,xmm2,XMMWORD PTR \[eax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq k3,xmm2,QWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd k3,zmm2,ZMMWORD PTR \[eax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd k3,zmm2,DWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd k3,ymm2,YMMWORD PTR \[eax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd k3,ymm2,DWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd k3,xmm2,XMMWORD PTR \[eax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd k3,xmm2,DWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq k3,zmm2,ZMMWORD PTR \[eax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq k3,zmm2,QWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq k3,ymm2,YMMWORD PTR \[eax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq k3,ymm2,QWORD BCST \[eax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq k3,xmm2,XMMWORD PTR \[eax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq k3,xmm2,QWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d1[ ]*vp2intersectd k2,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 50 01[ ]*vp2intersectd k2,zmm2,ZMMWORD PTR \[eax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 50 02[ ]*vp2intersectd k2,zmm2,DWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 e1[ ]*vp2intersectd k4,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 60 01[ ]*vp2intersectd k4,ymm2,YMMWORD PTR \[eax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 60 02[ ]*vp2intersectd k4,ymm2,DWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 f1[ ]*vp2intersectd k6,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 70 01[ ]*vp2intersectd k6,xmm2,XMMWORD PTR \[eax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 70 02[ ]*vp2intersectd k6,xmm2,DWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d1[ ]*vp2intersectq k2,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 50 01[ ]*vp2intersectq k2,zmm2,ZMMWORD PTR \[eax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 50 01[ ]*vp2intersectq k2,zmm2,QWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 e1[ ]*vp2intersectq k4,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 60 01[ ]*vp2intersectq k4,ymm2,YMMWORD PTR \[eax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 60 01[ ]*vp2intersectq k4,ymm2,QWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 f1[ ]*vp2intersectq k6,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 70 01[ ]*vp2intersectq k6,xmm2,XMMWORD PTR \[eax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 70 01[ ]*vp2intersectq k6,xmm2,QWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 c1[ ]*vp2intersectd k0,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 40 01[ ]*vp2intersectd k0,zmm2,ZMMWORD PTR \[eax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 40 02[ ]*vp2intersectd k0,zmm2,DWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d1[ ]*vp2intersectd k2,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 50 01[ ]*vp2intersectd k2,ymm2,YMMWORD PTR \[eax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 50 02[ ]*vp2intersectd k2,ymm2,DWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 e1[ ]*vp2intersectd k4,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 60 01[ ]*vp2intersectd k4,xmm2,XMMWORD PTR \[eax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 60 02[ ]*vp2intersectd k4,xmm2,DWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 c1[ ]*vp2intersectq k0,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 40 01[ ]*vp2intersectq k0,zmm2,ZMMWORD PTR \[eax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 40 01[ ]*vp2intersectq k0,zmm2,QWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d1[ ]*vp2intersectq k2,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 50 01[ ]*vp2intersectq k2,ymm2,YMMWORD PTR \[eax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 50 01[ ]*vp2intersectq k2,ymm2,QWORD BCST \[eax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 e1[ ]*vp2intersectq k4,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 60 01[ ]*vp2intersectq k4,xmm2,XMMWORD PTR \[eax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 60 01[ ]*vp2intersectq k4,xmm2,QWORD BCST \[eax\+0x8\]
#pass
diff --git a/gas/testsuite/gas/i386/vp2intersect-inval-bcast.s b/gas/testsuite/gas/i386/vp2intersect-inval-bcast.s
index 92a24ec..8ad7c67 100644
--- a/gas/testsuite/gas/i386/vp2intersect-inval-bcast.s
+++ b/gas/testsuite/gas/i386/vp2intersect-inval-bcast.s
@@ -2,17 +2,17 @@
.text
_start:
- vp2intersectd 8(%eax){1to8}, %xmm2, %k3
- vp2intersectd 8(%eax){1to16}, %ymm2, %k3
- vp2intersectd 8(%eax){1to8}, %zmm2, %k3
- vp2intersectq 8(%eax){1to4}, %xmm2, %k3
- vp2intersectq 8(%eax){1to8}, %ymm2, %k3
- vp2intersectq 8(%eax){1to16}, %zmm2, %k3
+ vp2intersectd 8(%eax){1to8}, %xmm2, %k2
+ vp2intersectd 8(%eax){1to16}, %ymm2, %k2
+ vp2intersectd 8(%eax){1to8}, %zmm2, %k2
+ vp2intersectq 8(%eax){1to4}, %xmm2, %k2
+ vp2intersectq 8(%eax){1to8}, %ymm2, %k2
+ vp2intersectq 8(%eax){1to16}, %zmm2, %k2
.intel_syntax noprefix
- vp2intersectd k3, zmm2, 8[eax]{1to8}
- vp2intersectd k3, ymm2, 8[eax]{1to16}
- vp2intersectd k3, xmm2, 8[eax]{1to8}
- vp2intersectq k3, zmm2, 8[eax]{1to16}
- vp2intersectq k3, ymm2, 8[eax]{1to8}
- vp2intersectq k3, xmm2, 8[eax]{1to4}
+ vp2intersectd k2, zmm2, 8[eax]{1to8}
+ vp2intersectd k2, ymm2, 8[eax]{1to16}
+ vp2intersectd k2, xmm2, 8[eax]{1to8}
+ vp2intersectq k2, zmm2, 8[eax]{1to16}
+ vp2intersectq k2, ymm2, 8[eax]{1to8}
+ vp2intersectq k2, xmm2, 8[eax]{1to4}
diff --git a/gas/testsuite/gas/i386/vp2intersect-warn.l b/gas/testsuite/gas/i386/vp2intersect-warn.l
new file mode 100644
index 0000000..e3550dd
--- /dev/null
+++ b/gas/testsuite/gas/i386/vp2intersect-warn.l
@@ -0,0 +1,31 @@
+.*: Assembler messages:
+.*:5: Warning: operand 3 `%k1' implicitly denotes `%k0' to `%k1' group in `vp2intersectd'
+.*:6: Warning: operand 3 `%k3' implicitly denotes `%k2' to `%k3' group in `vp2intersectd'
+.*:7: Warning: operand 3 `%k5' implicitly denotes `%k4' to `%k5' group in `vp2intersectd'
+.*:8: Warning: operand 3 `%k3' implicitly denotes `%k2' to `%k3' group in `vp2intersectq'
+.*:9: Warning: operand 3 `%k5' implicitly denotes `%k4' to `%k5' group in `vp2intersectq'
+.*:10: Warning: operand 3 `%k7' implicitly denotes `%k6' to `%k7' group in `vp2intersectq'
+
+[ ]*[0-9]+[ ]+# Check warning for odd destination register numbers.
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.text
+[ ]*[0-9]+[ ]+_start:
+[ ]*[0-9]+ .... 62F26F08[ ]+vp2intersectd \(%eax\), %xmm2, %k1
+.*Warning: .*
+[ ]*[0-9]+[ ]+6808
+[ ]*[0-9]+ .... 62F26F28[ ]+vp2intersectd \(%eax\), %ymm2, %k3
+.*Warning: .*
+[ ]*[0-9]+[ ]+6818
+[ ]*[0-9]+ .... 62F26F48[ ]+vp2intersectd \(%eax\), %zmm2, %k5
+.*Warning: .*
+[ ]*[0-9]+[ ]+6828
+[ ]*[0-9]+ .... 62F2EF08[ ]+vp2intersectq \(%eax\), %xmm2, %k3
+.*Warning: .*
+[ ]*[0-9]+[ ]+6818
+[ ]*[0-9]+ .... 62F2EF28[ ]+vp2intersectq \(%eax\), %ymm2, %k5
+.*Warning: .*
+[ ]*[0-9]+[ ]+6828
+[ ]*[0-9]+ .... 62F2EF48[ ]+vp2intersectq \(%eax\), %zmm2, %k7
+.*Warning: .*
+[ ]*[0-9]+[ ]+6838
+#pass
diff --git a/gas/testsuite/gas/i386/vp2intersect-warn.s b/gas/testsuite/gas/i386/vp2intersect-warn.s
new file mode 100644
index 0000000..d41c8bc
--- /dev/null
+++ b/gas/testsuite/gas/i386/vp2intersect-warn.s
@@ -0,0 +1,11 @@
+# Check warning for odd destination register numbers.
+
+ .text
+_start:
+ vp2intersectd (%eax), %xmm2, %k1
+ vp2intersectd (%eax), %ymm2, %k3
+ vp2intersectd (%eax), %zmm2, %k5
+ vp2intersectq (%eax), %xmm2, %k3
+ vp2intersectq (%eax), %ymm2, %k5
+ vp2intersectq (%eax), %zmm2, %k7
+ .end
diff --git a/gas/testsuite/gas/i386/vp2intersect.d b/gas/testsuite/gas/i386/vp2intersect.d
index cf55b01..e10e919 100644
--- a/gas/testsuite/gas/i386/vp2intersect.d
+++ b/gas/testsuite/gas/i386/vp2intersect.d
@@ -8,40 +8,40 @@
Disassembly of section \.text:
00000000 <\.text>:
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd 0x40\(%eax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd 0x8\(%eax\)\{1to16\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd 0x20\(%eax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd 0x8\(%eax\)\{1to8\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd 0x10\(%eax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd 0x8\(%eax\)\{1to4\},%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq 0x40\(%eax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq 0x8\(%eax\)\{1to8\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq 0x20\(%eax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq 0x8\(%eax\)\{1to4\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq 0x10\(%eax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq 0x8\(%eax\)\{1to2\},%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd 0x40\(%eax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd 0x8\(%eax\)\{1to16\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd 0x20\(%eax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd 0x8\(%eax\)\{1to8\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd 0x10\(%eax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd 0x8\(%eax\)\{1to4\},%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq 0x40\(%eax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq 0x8\(%eax\)\{1to8\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq 0x20\(%eax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq 0x8\(%eax\)\{1to4\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq 0x10\(%eax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq 0x8\(%eax\)\{1to2\},%xmm2,%k3
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d1[ ]*vp2intersectd %zmm1,%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 50 01[ ]*vp2intersectd 0x40\(%eax\),%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 50 02[ ]*vp2intersectd 0x8\(%eax\)\{1to16\},%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 e1[ ]*vp2intersectd %ymm1,%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 60 01[ ]*vp2intersectd 0x20\(%eax\),%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 60 02[ ]*vp2intersectd 0x8\(%eax\)\{1to8\},%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 f1[ ]*vp2intersectd %xmm1,%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 70 01[ ]*vp2intersectd 0x10\(%eax\),%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 70 02[ ]*vp2intersectd 0x8\(%eax\)\{1to4\},%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d1[ ]*vp2intersectq %zmm1,%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 50 01[ ]*vp2intersectq 0x40\(%eax\),%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 50 01[ ]*vp2intersectq 0x8\(%eax\)\{1to8\},%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 e1[ ]*vp2intersectq %ymm1,%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 60 01[ ]*vp2intersectq 0x20\(%eax\),%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 60 01[ ]*vp2intersectq 0x8\(%eax\)\{1to4\},%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 f1[ ]*vp2intersectq %xmm1,%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 70 01[ ]*vp2intersectq 0x10\(%eax\),%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 70 01[ ]*vp2intersectq 0x8\(%eax\)\{1to2\},%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 c1[ ]*vp2intersectd %zmm1,%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 40 01[ ]*vp2intersectd 0x40\(%eax\),%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 40 02[ ]*vp2intersectd 0x8\(%eax\)\{1to16\},%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d1[ ]*vp2intersectd %ymm1,%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 50 01[ ]*vp2intersectd 0x20\(%eax\),%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 50 02[ ]*vp2intersectd 0x8\(%eax\)\{1to8\},%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 e1[ ]*vp2intersectd %xmm1,%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 60 01[ ]*vp2intersectd 0x10\(%eax\),%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 60 02[ ]*vp2intersectd 0x8\(%eax\)\{1to4\},%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 c1[ ]*vp2intersectq %zmm1,%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 40 01[ ]*vp2intersectq 0x40\(%eax\),%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 40 01[ ]*vp2intersectq 0x8\(%eax\)\{1to8\},%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d1[ ]*vp2intersectq %ymm1,%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 50 01[ ]*vp2intersectq 0x20\(%eax\),%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 50 01[ ]*vp2intersectq 0x8\(%eax\)\{1to4\},%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 e1[ ]*vp2intersectq %xmm1,%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 60 01[ ]*vp2intersectq 0x10\(%eax\),%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 60 01[ ]*vp2intersectq 0x8\(%eax\)\{1to2\},%xmm2,%k4
#pass
diff --git a/gas/testsuite/gas/i386/vp2intersect.s b/gas/testsuite/gas/i386/vp2intersect.s
index 7d2a9d7..f4636ba 100644
--- a/gas/testsuite/gas/i386/vp2intersect.s
+++ b/gas/testsuite/gas/i386/vp2intersect.s
@@ -1,51 +1,51 @@
# Check AVX512_VP2INTERSECT new instructions.
.text
- vp2intersectd %zmm1, %zmm2, %k3
- vp2intersectd 64(%eax), %zmm2, %k3
- vp2intersectd 8(%eax){1to16}, %zmm2, %k3
+ vp2intersectd %zmm1, %zmm2, %k2
+ vp2intersectd 64(%eax), %zmm2, %k2
+ vp2intersectd 8(%eax){1to16}, %zmm2, %k2
- vp2intersectd %ymm1, %ymm2, %k3
- vp2intersectd 32(%eax), %ymm2, %k3
- vp2intersectd 8(%eax){1to8}, %ymm2, %k3
+ vp2intersectd %ymm1, %ymm2, %k4
+ vp2intersectd 32(%eax), %ymm2, %k4
+ vp2intersectd 8(%eax){1to8}, %ymm2, %k4
- vp2intersectd %xmm1, %xmm2, %k3
- vp2intersectd 16(%eax), %xmm2, %k3
- vp2intersectd 8(%eax){1to4}, %xmm2, %k3
+ vp2intersectd %xmm1, %xmm2, %k6
+ vp2intersectd 16(%eax), %xmm2, %k6
+ vp2intersectd 8(%eax){1to4}, %xmm2, %k6
- vp2intersectq %zmm1, %zmm2, %k3
- vp2intersectq 64(%eax), %zmm2, %k3
- vp2intersectq 8(%eax){1to8}, %zmm2, %k3
+ vp2intersectq %zmm1, %zmm2, %k2
+ vp2intersectq 64(%eax), %zmm2, %k2
+ vp2intersectq 8(%eax){1to8}, %zmm2, %k2
- vp2intersectq %ymm1, %ymm2, %k3
- vp2intersectq 32(%eax), %ymm2, %k3
- vp2intersectq 8(%eax){1to4}, %ymm2, %k3
+ vp2intersectq %ymm1, %ymm2, %k4
+ vp2intersectq 32(%eax), %ymm2, %k4
+ vp2intersectq 8(%eax){1to4}, %ymm2, %k4
- vp2intersectq %xmm1, %xmm2, %k3
- vp2intersectq 16(%eax), %xmm2, %k3
- vp2intersectq 8(%eax){1to2}, %xmm2, %k3
+ vp2intersectq %xmm1, %xmm2, %k6
+ vp2intersectq 16(%eax), %xmm2, %k6
+ vp2intersectq 8(%eax){1to2}, %xmm2, %k6
.intel_syntax noprefix
- vp2intersectd k3, zmm2, zmm1
- vp2intersectd k3, zmm2, 64[eax]
- vp2intersectd k3, zmm2, dword bcst 8[eax]
+ vp2intersectd k0, zmm2, zmm1
+ vp2intersectd k0, zmm2, 64[eax]
+ vp2intersectd k0, zmm2, dword bcst 8[eax]
- vp2intersectd k3, ymm2, ymm1
- vp2intersectd k3, ymm2, 32[eax]
- vp2intersectd k3, ymm2, dword bcst 8[eax]
+ vp2intersectd k2, ymm2, ymm1
+ vp2intersectd k2, ymm2, 32[eax]
+ vp2intersectd k2, ymm2, dword bcst 8[eax]
- vp2intersectd k3, xmm2, xmm1
- vp2intersectd k3, xmm2, 16[eax]
- vp2intersectd k3, xmm2, dword bcst 8[eax]
+ vp2intersectd k4, xmm2, xmm1
+ vp2intersectd k4, xmm2, 16[eax]
+ vp2intersectd k4, xmm2, dword bcst 8[eax]
- vp2intersectq k3, zmm2, zmm1
- vp2intersectq k3, zmm2, 64[eax]
- vp2intersectq k3, zmm2, qword bcst 8[eax]
+ vp2intersectq k0, zmm2, zmm1
+ vp2intersectq k0, zmm2, 64[eax]
+ vp2intersectq k0, zmm2, qword bcst 8[eax]
- vp2intersectq k3, ymm2, ymm1
- vp2intersectq k3, ymm2, 32[eax]
- vp2intersectq k3, ymm2, qword bcst 8[eax]
+ vp2intersectq k2, ymm2, ymm1
+ vp2intersectq k2, ymm2, 32[eax]
+ vp2intersectq k2, ymm2, qword bcst 8[eax]
- vp2intersectq k3, xmm2, xmm1
- vp2intersectq k3, xmm2, 16[eax]
- vp2intersectq k3, xmm2, qword bcst 8[eax]
+ vp2intersectq k4, xmm2, xmm1
+ vp2intersectq k4, xmm2, 16[eax]
+ vp2intersectq k4, xmm2, qword bcst 8[eax]
diff --git a/gas/testsuite/gas/i386/x86-64-arch-5.d b/gas/testsuite/gas/i386/x86-64-arch-5.d
index d4d484b..b59d27f 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-5.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-5.d
@@ -9,6 +9,6 @@ Disassembly of section .text:
[ ]*[a-f0-9]+:[ ]*c4 c2 59 50 d4[ ]*\{vex\} vpdpbusd %xmm12,%xmm4,%xmm2
[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 e1[ ]*vp2intersectd %zmm1,%zmm2,%k4
[ ]*[a-f0-9]+:[ ]*0f 18 3d 78 56 34 12[ ]*prefetchit0 0x12345678\(%rip\) # .*
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-5.s b/gas/testsuite/gas/i386/x86-64-arch-5.s
index f359f4e..2a28c7b 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-5.s
+++ b/gas/testsuite/gas/i386/x86-64-arch-5.s
@@ -4,5 +4,5 @@
{vex} vpdpbusd %xmm12, %xmm4, %xmm2 #AVX_VNNI
movdiri %rax, (%rcx) #MOVDIRI
movdir64b (%rcx), %rax #MOVDIR64B
- vp2intersectd %zmm1, %zmm2, %k3 #AVX512_VP2INTERSECT
+ vp2intersectd %zmm1, %zmm2, %k4 #AVX512_VP2INTERSECT
prefetchit0 0x12345678(%rip) #prefetchi
diff --git a/gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d b/gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d
index 050850c..cd7ea1f 100644
--- a/gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d
@@ -8,40 +8,40 @@
Disassembly of section \.text:
0+ <\.text>:
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd k3,zmm2,ZMMWORD PTR \[rax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd k3,zmm2,DWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd k3,ymm2,YMMWORD PTR \[rax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd k3,ymm2,DWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd k3,xmm2,XMMWORD PTR \[rax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd k3,xmm2,DWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq k3,zmm2,ZMMWORD PTR \[rax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq k3,zmm2,QWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq k3,ymm2,YMMWORD PTR \[rax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq k3,ymm2,QWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq k3,xmm2,XMMWORD PTR \[rax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq k3,xmm2,QWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd k3,zmm2,ZMMWORD PTR \[rax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd k3,zmm2,DWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd k3,ymm2,YMMWORD PTR \[rax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd k3,ymm2,DWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd k3,xmm2,XMMWORD PTR \[rax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd k3,xmm2,DWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq k3,zmm2,zmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq k3,zmm2,ZMMWORD PTR \[rax\+0x40\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq k3,zmm2,QWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq k3,ymm2,ymm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq k3,ymm2,YMMWORD PTR \[rax\+0x20\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq k3,ymm2,QWORD BCST \[rax\+0x8\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq k3,xmm2,xmm1
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq k3,xmm2,XMMWORD PTR \[rax\+0x10\]
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq k3,xmm2,QWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 c1[ ]*vp2intersectd k0,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 40 01[ ]*vp2intersectd k0,zmm2,ZMMWORD PTR \[rax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 40 02[ ]*vp2intersectd k0,zmm2,DWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d1[ ]*vp2intersectd k2,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 50 01[ ]*vp2intersectd k2,ymm2,YMMWORD PTR \[rax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 50 02[ ]*vp2intersectd k2,ymm2,DWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 e1[ ]*vp2intersectd k4,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 60 01[ ]*vp2intersectd k4,xmm2,XMMWORD PTR \[rax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 60 02[ ]*vp2intersectd k4,xmm2,DWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 c1[ ]*vp2intersectq k0,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 40 01[ ]*vp2intersectq k0,zmm2,ZMMWORD PTR \[rax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 40 01[ ]*vp2intersectq k0,zmm2,QWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d1[ ]*vp2intersectq k2,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 50 01[ ]*vp2intersectq k2,ymm2,YMMWORD PTR \[rax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 50 01[ ]*vp2intersectq k2,ymm2,QWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 e1[ ]*vp2intersectq k4,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 60 01[ ]*vp2intersectq k4,xmm2,XMMWORD PTR \[rax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 60 01[ ]*vp2intersectq k4,xmm2,QWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d1[ ]*vp2intersectd k2,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 50 01[ ]*vp2intersectd k2,zmm2,ZMMWORD PTR \[rax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 50 02[ ]*vp2intersectd k2,zmm2,DWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 e1[ ]*vp2intersectd k4,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 60 01[ ]*vp2intersectd k4,ymm2,YMMWORD PTR \[rax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 60 02[ ]*vp2intersectd k4,ymm2,DWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 f1[ ]*vp2intersectd k6,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 70 01[ ]*vp2intersectd k6,xmm2,XMMWORD PTR \[rax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 70 02[ ]*vp2intersectd k6,xmm2,DWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d1[ ]*vp2intersectq k2,zmm2,zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 50 01[ ]*vp2intersectq k2,zmm2,ZMMWORD PTR \[rax\+0x40\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 50 01[ ]*vp2intersectq k2,zmm2,QWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 e1[ ]*vp2intersectq k4,ymm2,ymm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 60 01[ ]*vp2intersectq k4,ymm2,YMMWORD PTR \[rax\+0x20\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 60 01[ ]*vp2intersectq k4,ymm2,QWORD BCST \[rax\+0x8\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 f1[ ]*vp2intersectq k6,xmm2,xmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 70 01[ ]*vp2intersectq k6,xmm2,XMMWORD PTR \[rax\+0x10\]
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 70 01[ ]*vp2intersectq k6,xmm2,QWORD BCST \[rax\+0x8\]
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s b/gas/testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s
index a972190..eaf2be4 100644
--- a/gas/testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s
+++ b/gas/testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s
@@ -2,17 +2,17 @@
.text
_start:
- vp2intersectd 8(%rax){1to8}, %zmm2, %k3
- vp2intersectd 8(%rax){1to4}, %ymm2, %k3
- vp2intersectd 8(%rax){1to2}, %xmm2, %k3
- vp2intersectq 8(%rax){1to16}, %zmm2, %k3
- vp2intersectq 8(%rax){1to8}, %ymm2, %k3
- vp2intersectq 8(%rax){1to4}, %xmm2, %k3
+ vp2intersectd 8(%rax){1to8}, %zmm2, %k2
+ vp2intersectd 8(%rax){1to4}, %ymm2, %k2
+ vp2intersectd 8(%rax){1to2}, %xmm2, %k2
+ vp2intersectq 8(%rax){1to16}, %zmm2, %k2
+ vp2intersectq 8(%rax){1to8}, %ymm2, %k2
+ vp2intersectq 8(%rax){1to4}, %xmm2, %k2
.intel_syntax noprefix
- vp2intersectd k3, zmm2, 8[rax]{1to8}
- vp2intersectd k3, ymm2, 8[rax]{1to4}
- vp2intersectd k3, xmm2, 8[rax]{1to2}
- vp2intersectq k3, zmm2, 8[rax]{1to16}
- vp2intersectq k3, ymm2, 8[rax]{1to8}
- vp2intersectq k3, xmm2, 8[rax]{1to4}
+ vp2intersectd k4, zmm2, 8[rax]{1to8}
+ vp2intersectd k4, ymm2, 8[rax]{1to4}
+ vp2intersectd k4, xmm2, 8[rax]{1to2}
+ vp2intersectq k4, zmm2, 8[rax]{1to16}
+ vp2intersectq k4, ymm2, 8[rax]{1to8}
+ vp2intersectq k4, xmm2, 8[rax]{1to4}
diff --git a/gas/testsuite/gas/i386/x86-64-vp2intersect.d b/gas/testsuite/gas/i386/x86-64-vp2intersect.d
index 6d9be0c..3dde35b 100644
--- a/gas/testsuite/gas/i386/x86-64-vp2intersect.d
+++ b/gas/testsuite/gas/i386/x86-64-vp2intersect.d
@@ -8,40 +8,40 @@
Disassembly of section \.text:
0+ <\.text>:
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd 0x40\(%rax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd 0x8\(%rax\)\{1to16\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd 0x20\(%rax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd 0x8\(%rax\)\{1to8\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd 0x10\(%rax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd 0x8\(%rax\)\{1to4\},%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq 0x40\(%rax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq 0x8\(%rax\)\{1to8\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq 0x20\(%rax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq 0x8\(%rax\)\{1to4\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq 0x10\(%rax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq 0x8\(%rax\)\{1to2\},%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 58 01[ ]*vp2intersectd 0x40\(%rax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 58 02[ ]*vp2intersectd 0x8\(%rax\)\{1to16\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d9[ ]*vp2intersectd %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 58 01[ ]*vp2intersectd 0x20\(%rax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 58 02[ ]*vp2intersectd 0x8\(%rax\)\{1to8\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 d9[ ]*vp2intersectd %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 58 01[ ]*vp2intersectd 0x10\(%rax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 58 02[ ]*vp2intersectd 0x8\(%rax\)\{1to4\},%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d9[ ]*vp2intersectq %zmm1,%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 58 01[ ]*vp2intersectq 0x40\(%rax\),%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 58 01[ ]*vp2intersectq 0x8\(%rax\)\{1to8\},%zmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d9[ ]*vp2intersectq %ymm1,%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 58 01[ ]*vp2intersectq 0x20\(%rax\),%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 58 01[ ]*vp2intersectq 0x8\(%rax\)\{1to4\},%ymm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 d9[ ]*vp2intersectq %xmm1,%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 58 01[ ]*vp2intersectq 0x10\(%rax\),%xmm2,%k3
-[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 58 01[ ]*vp2intersectq 0x8\(%rax\)\{1to2\},%xmm2,%k3
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 c1[ ]*vp2intersectd %zmm1,%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 40 01[ ]*vp2intersectd 0x40\(%rax\),%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 40 02[ ]*vp2intersectd 0x8\(%rax\)\{1to16\},%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 d1[ ]*vp2intersectd %ymm1,%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 50 01[ ]*vp2intersectd 0x20\(%rax\),%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 50 02[ ]*vp2intersectd 0x8\(%rax\)\{1to8\},%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 e1[ ]*vp2intersectd %xmm1,%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 60 01[ ]*vp2intersectd 0x10\(%rax\),%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 60 02[ ]*vp2intersectd 0x8\(%rax\)\{1to4\},%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 c1[ ]*vp2intersectq %zmm1,%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 40 01[ ]*vp2intersectq 0x40\(%rax\),%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 40 01[ ]*vp2intersectq 0x8\(%rax\)\{1to8\},%zmm2,%k0
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 d1[ ]*vp2intersectq %ymm1,%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 50 01[ ]*vp2intersectq 0x20\(%rax\),%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 50 01[ ]*vp2intersectq 0x8\(%rax\)\{1to4\},%ymm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 e1[ ]*vp2intersectq %xmm1,%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 60 01[ ]*vp2intersectq 0x10\(%rax\),%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 60 01[ ]*vp2intersectq 0x8\(%rax\)\{1to2\},%xmm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d1[ ]*vp2intersectd %zmm1,%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 50 01[ ]*vp2intersectd 0x40\(%rax\),%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 58 68 50 02[ ]*vp2intersectd 0x8\(%rax\)\{1to16\},%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 e1[ ]*vp2intersectd %ymm1,%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 28 68 60 01[ ]*vp2intersectd 0x20\(%rax\),%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 38 68 60 02[ ]*vp2intersectd 0x8\(%rax\)\{1to8\},%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 f1[ ]*vp2intersectd %xmm1,%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 08 68 70 01[ ]*vp2intersectd 0x10\(%rax\),%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 18 68 70 02[ ]*vp2intersectd 0x8\(%rax\)\{1to4\},%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 d1[ ]*vp2intersectq %zmm1,%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 48 68 50 01[ ]*vp2intersectq 0x40\(%rax\),%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 58 68 50 01[ ]*vp2intersectq 0x8\(%rax\)\{1to8\},%zmm2,%k2
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 e1[ ]*vp2intersectq %ymm1,%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 28 68 60 01[ ]*vp2intersectq 0x20\(%rax\),%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 38 68 60 01[ ]*vp2intersectq 0x8\(%rax\)\{1to4\},%ymm2,%k4
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 f1[ ]*vp2intersectq %xmm1,%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 08 68 70 01[ ]*vp2intersectq 0x10\(%rax\),%xmm2,%k6
+[ ]*[a-f0-9]+:[ ]*62 f2 ef 18 68 70 01[ ]*vp2intersectq 0x8\(%rax\)\{1to2\},%xmm2,%k6
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-vp2intersect.s b/gas/testsuite/gas/i386/x86-64-vp2intersect.s
index cc4353c..8642a05 100644
--- a/gas/testsuite/gas/i386/x86-64-vp2intersect.s
+++ b/gas/testsuite/gas/i386/x86-64-vp2intersect.s
@@ -1,51 +1,51 @@
# Check AVX512_VP2INTERSECT new instructions.
.text
- vp2intersectd %zmm1, %zmm2, %k3
- vp2intersectd 64(%rax), %zmm2, %k3
- vp2intersectd 8(%rax){1to16}, %zmm2, %k3
+ vp2intersectd %zmm1, %zmm2, %k0
+ vp2intersectd 64(%rax), %zmm2, %k0
+ vp2intersectd 8(%rax){1to16}, %zmm2, %k0
- vp2intersectd %ymm1, %ymm2, %k3
- vp2intersectd 32(%rax), %ymm2, %k3
- vp2intersectd 8(%rax){1to8}, %ymm2, %k3
+ vp2intersectd %ymm1, %ymm2, %k2
+ vp2intersectd 32(%rax), %ymm2, %k2
+ vp2intersectd 8(%rax){1to8}, %ymm2, %k2
- vp2intersectd %xmm1, %xmm2, %k3
- vp2intersectd 16(%rax), %xmm2, %k3
- vp2intersectd 8(%rax){1to4}, %xmm2, %k3
+ vp2intersectd %xmm1, %xmm2, %k4
+ vp2intersectd 16(%rax), %xmm2, %k4
+ vp2intersectd 8(%rax){1to4}, %xmm2, %k4
- vp2intersectq %zmm1, %zmm2, %k3
- vp2intersectq 64(%rax), %zmm2, %k3
- vp2intersectq 8(%rax){1to8}, %zmm2, %k3
+ vp2intersectq %zmm1, %zmm2, %k0
+ vp2intersectq 64(%rax), %zmm2, %k0
+ vp2intersectq 8(%rax){1to8}, %zmm2, %k0
- vp2intersectq %ymm1, %ymm2, %k3
- vp2intersectq 32(%rax), %ymm2, %k3
- vp2intersectq 8(%rax){1to4}, %ymm2, %k3
+ vp2intersectq %ymm1, %ymm2, %k2
+ vp2intersectq 32(%rax), %ymm2, %k2
+ vp2intersectq 8(%rax){1to4}, %ymm2, %k2
- vp2intersectq %xmm1, %xmm2, %k3
- vp2intersectq 16(%rax), %xmm2, %k3
- vp2intersectq 8(%rax){1to2}, %xmm2, %k3
+ vp2intersectq %xmm1, %xmm2, %k4
+ vp2intersectq 16(%rax), %xmm2, %k4
+ vp2intersectq 8(%rax){1to2}, %xmm2, %k4
.intel_syntax noprefix
- vp2intersectd k3, zmm2, zmm1
- vp2intersectd k3, zmm2, 64[rax]
- vp2intersectd k3, zmm2, dword bcst 8[rax]
+ vp2intersectd k2, zmm2, zmm1
+ vp2intersectd k2, zmm2, 64[rax]
+ vp2intersectd k2, zmm2, dword bcst 8[rax]
- vp2intersectd k3, ymm2, ymm1
- vp2intersectd k3, ymm2, 32[rax]
- vp2intersectd k3, ymm2, dword bcst 8[rax]
+ vp2intersectd k4, ymm2, ymm1
+ vp2intersectd k4, ymm2, 32[rax]
+ vp2intersectd k4, ymm2, dword bcst 8[rax]
- vp2intersectd k3, xmm2, xmm1
- vp2intersectd k3, xmm2, 16[rax]
- vp2intersectd k3, xmm2, dword bcst 8[rax]
+ vp2intersectd k6, xmm2, xmm1
+ vp2intersectd k6, xmm2, 16[rax]
+ vp2intersectd k6, xmm2, dword bcst 8[rax]
- vp2intersectq k3, zmm2, zmm1
- vp2intersectq k3, zmm2, 64[rax]
- vp2intersectq k3, zmm2, qword bcst 8[rax]
+ vp2intersectq k2, zmm2, zmm1
+ vp2intersectq k2, zmm2, 64[rax]
+ vp2intersectq k2, zmm2, qword bcst 8[rax]
- vp2intersectq k3, ymm2, ymm1
- vp2intersectq k3, ymm2, 32[rax]
- vp2intersectq k3, ymm2, qword bcst 8[rax]
+ vp2intersectq k4, ymm2, ymm1
+ vp2intersectq k4, ymm2, 32[rax]
+ vp2intersectq k4, ymm2, qword bcst 8[rax]
- vp2intersectq k3, xmm2, xmm1
- vp2intersectq k3, xmm2, 16[rax]
- vp2intersectq k3, xmm2, qword bcst 8[rax]
+ vp2intersectq k6, xmm2, xmm1
+ vp2intersectq k6, xmm2, 16[rax]
+ vp2intersectq k6, xmm2, qword bcst 8[rax]
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 90837b1..8a86938 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3130,7 +3130,7 @@ enqcmds, 0xf3f8, APX_F(ENQCMD), Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecif
// VP2INTERSECT instructions.
-vp2intersect<dq>, 0xf268, AVX512_VP2INTERSECT, Modrm|Space0F38|Src1VVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegMask }
+vp2intersect<dq>, 0xf268, AVX512_VP2INTERSECT, Modrm|Space0F38|Src1VVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|ImplicitGroup, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegMask }
// VP2INTERSECT instructions end.
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 8707529..5937090 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -42711,7 +42711,7 @@ static const insn_template i386_optab[] =
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vp2intersectd, 0x68, 3, SPACE_0F38, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 1, 1, 3, 0, 0, 5, 0, 3, 0, 0, 7, 0, 0, 0, 0, 0,
0, 0 },
{ { 84, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -42723,7 +42723,7 @@ static const insn_template i386_optab[] =
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vp2intersectq, 0x68, 3, SPACE_0F38, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 1, 2, 3, 0, 0, 5, 0, 4, 0, 0, 7, 0, 0, 0, 0, 0,
0, 0 },
{ { 84, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },