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authorJim Wilson <jimw@sifive.com>2018-08-08 10:48:09 -0700
committerJim Wilson <jimw@sifive.com>2018-08-08 10:51:40 -0700
commit411baa470ef354e50b488c0c736ac7af8d856ded (patch)
treeb3720c632a22765c78c1d416c58d90cb97a6a2a3
parentf384a1f025084a4a6370d7ada6dc7198ad3454e4 (diff)
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RISC-V: Make riscv_isa_xlen a global function.
This allows the function to be used from riscv OS files, which also need to depend on XLEN size. gdb/ * riscv-tdep.c (riscv_isa_xlen): Drop static. * riscv-tdep.h (riscv_isa_xlen): Add extern declaration.
-rw-r--r--gdb/ChangeLog5
-rw-r--r--gdb/riscv-tdep.c2
-rw-r--r--gdb/riscv-tdep.h3
3 files changed, 9 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 682520f..d170a2e 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2018-08-08 Jim Wilson <jimw@sifive.com>
+
+ * riscv-tdep.c (riscv_isa_xlen): Drop static.
+ * riscv-tdep.h (riscv_isa_xlen): Add extern declaration.
+
2018-08-08 Andrew Burgess <andrew.burgess@embecosm.com>
PR gdb/18050:
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index abcac98..2018189 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -346,7 +346,7 @@ riscv_has_feature (struct gdbarch *gdbarch, char feature)
Possible return values are 4, 8, or 16 for RiscV variants RV32, RV64, or
RV128. */
-static int
+int
riscv_isa_xlen (struct gdbarch *gdbarch)
{
switch (gdbarch_tdep (gdbarch)->abi.fields.base_len)
diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
index 4fc0597..b35266d 100644
--- a/gdb/riscv-tdep.h
+++ b/gdb/riscv-tdep.h
@@ -76,4 +76,7 @@ struct gdbarch_tdep
unsigned core_features;
};
+/* Return the width in bytes of the general purpose registers for GDBARCH. */
+extern int riscv_isa_xlen (struct gdbarch *gdbarch);
+
#endif /* RISCV_TDEP_H */