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authorMaciej W. Rozycki <macro@orcam.me.uk>2021-05-29 03:26:32 +0200
committerMaciej W. Rozycki <macro@orcam.me.uk>2021-05-29 03:26:32 +0200
commit270e2b7ddc265066ed1d201fbeca5c10fa3c6fc0 (patch)
treee323917b764c36b67001db854e69d87ee80da0da
parentb930964c425533f2344c6b26d4af17200bb42928 (diff)
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MIPS/GAS/testsuite: Add tests for coprocessor branch instructions
Cover basic CP0, CP2, CP3 branch and branch-likely instructions across the relevant ISA levels. Omit CP1 branches, covered elsewhere. gas/ * testsuite/gas/mips/cp0b.d: New test. * testsuite/gas/mips/cp0bl.d: New test. * testsuite/gas/mips/cp2b.d: New test. * testsuite/gas/mips/micromips@cp2b.d: New test. * testsuite/gas/mips/cp2bl.d: New test. * testsuite/gas/mips/micromips@cp2bl.d: New test. * testsuite/gas/mips/cp3b.d: New test. * testsuite/gas/mips/cp3bl.d: New test. * testsuite/gas/mips/cp0b.s: New test source. * testsuite/gas/mips/cp0bl.s: New test source. * testsuite/gas/mips/cp2b.s: New test source. * testsuite/gas/mips/cp2bl.s: New test source. * testsuite/gas/mips/cp3b.s: New test source. * testsuite/gas/mips/cp3bl.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
Diffstat
-rw-r--r--gas/ChangeLog18
-rw-r--r--gas/testsuite/gas/mips/cp0b.d12
-rw-r--r--gas/testsuite/gas/mips/cp0b.s13
-rw-r--r--gas/testsuite/gas/mips/cp0bl.d12
-rw-r--r--gas/testsuite/gas/mips/cp0bl.s14
-rw-r--r--gas/testsuite/gas/mips/cp2b.d12
-rw-r--r--gas/testsuite/gas/mips/cp2b.s13
-rw-r--r--gas/testsuite/gas/mips/cp2bl.d12
-rw-r--r--gas/testsuite/gas/mips/cp2bl.s14
-rw-r--r--gas/testsuite/gas/mips/cp3b.d12
-rw-r--r--gas/testsuite/gas/mips/cp3b.s13
-rw-r--r--gas/testsuite/gas/mips/cp3bl.d12
-rw-r--r--gas/testsuite/gas/mips/cp3bl.s14
-rw-r--r--gas/testsuite/gas/mips/micromips@cp2b.d14
-rw-r--r--gas/testsuite/gas/mips/micromips@cp2bl.d18
-rw-r--r--gas/testsuite/gas/mips/mips.exp12
16 files changed, 215 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index b4b6387..e5c2ecf 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,23 @@
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
+ * testsuite/gas/mips/cp0b.d: New test.
+ * testsuite/gas/mips/cp0bl.d: New test.
+ * testsuite/gas/mips/cp2b.d: New test.
+ * testsuite/gas/mips/micromips@cp2b.d: New test.
+ * testsuite/gas/mips/cp2bl.d: New test.
+ * testsuite/gas/mips/micromips@cp2bl.d: New test.
+ * testsuite/gas/mips/cp3b.d: New test.
+ * testsuite/gas/mips/cp3bl.d: New test.
+ * testsuite/gas/mips/cp0b.s: New test source.
+ * testsuite/gas/mips/cp0bl.s: New test source.
+ * testsuite/gas/mips/cp2b.s: New test source.
+ * testsuite/gas/mips/cp2bl.s: New test source.
+ * testsuite/gas/mips/cp3b.s: New test source.
+ * testsuite/gas/mips/cp3bl.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
+
* testsuite/gas/mips/rfe.d: New test.
* testsuite/gas/mips/rfe.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
diff --git a/gas/testsuite/gas/mips/cp0b.d b/gas/testsuite/gas/mips/cp0b.d
new file mode 100644
index 0000000..ad1e4d3
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0b.d
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 branch instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 41000001 bc0f [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 41010001 bc0t [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/cp0b.s b/gas/testsuite/gas/mips/cp0b.s
new file mode 100644
index 0000000..ec50fc6
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0b.s
@@ -0,0 +1,13 @@
+ .text
+foo:
+ xor $16, $16
+ bc0f 0f
+0:
+ xor $16, $16
+ bc0t 0f
+0:
+ .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/gas/testsuite/gas/mips/cp0bl.d b/gas/testsuite/gas/mips/cp0bl.d
new file mode 100644
index 0000000..834d2d9
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0bl.d
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 branch likely instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 41020001 bc0fl [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 41030001 bc0tl [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/cp0bl.s b/gas/testsuite/gas/mips/cp0bl.s
new file mode 100644
index 0000000..170471b
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0bl.s
@@ -0,0 +1,14 @@
+ .text
+ .set noreorder
+foo:
+ bc0fl 0f
+ xor $16, $16
+0:
+ bc0tl 0f
+ xor $16, $16
+0:
+ .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/gas/testsuite/gas/mips/cp2b.d b/gas/testsuite/gas/mips/cp2b.d
new file mode 100644
index 0000000..23e1b60
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2b.d
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 49000001 bc2f [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 49010001 bc2t [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/cp2b.s b/gas/testsuite/gas/mips/cp2b.s
new file mode 100644
index 0000000..91ac582
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2b.s
@@ -0,0 +1,13 @@
+ .text
+foo:
+ xor $16, $16
+ bc2f 0f
+0:
+ xor $16, $16
+ bc2t 0f
+0:
+ .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/gas/testsuite/gas/mips/cp2bl.d b/gas/testsuite/gas/mips/cp2bl.d
new file mode 100644
index 0000000..d949493
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2bl.d
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch likely instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 49020001 bc2fl [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 49030001 bc2tl [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/cp2bl.s b/gas/testsuite/gas/mips/cp2bl.s
new file mode 100644
index 0000000..29d4ff5
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2bl.s
@@ -0,0 +1,14 @@
+ .text
+ .set noreorder
+foo:
+ bc2fl 0f
+ xor $16, $16
+0:
+ bc2tl 0f
+ xor $16, $16
+0:
+ .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/gas/testsuite/gas/mips/cp3b.d b/gas/testsuite/gas/mips/cp3b.d
new file mode 100644
index 0000000..c0b3962
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3b.d
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 branch instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4d000001 bc3f [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 4d010001 bc3t [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/cp3b.s b/gas/testsuite/gas/mips/cp3b.s
new file mode 100644
index 0000000..5b1f6e9
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3b.s
@@ -0,0 +1,13 @@
+ .text
+foo:
+ xor $16, $16
+ bc3f 0f
+0:
+ xor $16, $16
+ bc3t 0f
+0:
+ .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/gas/testsuite/gas/mips/cp3bl.d b/gas/testsuite/gas/mips/cp3bl.d
new file mode 100644
index 0000000..4530517
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3bl.d
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 branch likely instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4d020001 bc3fl [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 4d030001 bc3tl [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026 xor s0,s0,s0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/cp3bl.s b/gas/testsuite/gas/mips/cp3bl.s
new file mode 100644
index 0000000..c1664c8
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3bl.s
@@ -0,0 +1,14 @@
+ .text
+ .set noreorder
+foo:
+ bc3fl 0f
+ xor $16, $16
+0:
+ bc3tl 0f
+ xor $16, $16
+0:
+ .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
diff --git a/gas/testsuite/gas/mips/micromips@cp2b.d b/gas/testsuite/gas/mips/micromips@cp2b.d
new file mode 100644
index 0000000..b0e8496
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@cp2b.d
@@ -0,0 +1,14 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch instructions
+#as: -32
+#source: cp2b.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4280 fffe bc2f [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 42a0 fffe bc2t [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 0000 0000 nop
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@cp2bl.d b/gas/testsuite/gas/mips/micromips@cp2bl.d
new file mode 100644
index 0000000..97d27cc
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@cp2bl.d
@@ -0,0 +1,18 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch likely instructions
+#as: -32
+#source: cp2bl.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 42a0 fffe bc2t [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0c00 nop
+[0-9a-f]+ <[^>]*> 9400 fffe b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440 xor s0,s0,s0
+[0-9a-f]+ <[^>]*> 4280 fffe bc2f [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0c00 nop
+[0-9a-f]+ <[^>]*> 9400 fffe b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440 xor s0,s0,s0
+ \.\.\.
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 65a74dd..1b8c47e 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1335,6 +1335,10 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "cp0c" [mips_arch_list_matching mips1 \
!mips32 !micromips]
+ run_dump_test_arches "cp0b" [mips_arch_list_matching mips1 \
+ !mips4 !mips32 !micromips]
+ run_dump_test_arches "cp0bl" [mips_arch_list_matching mips2 \
+ !mips4 !mips32 !micromips]
run_dump_test_arches "cp0m" [mips_arch_list_matching mips1 \
!mips2 !micromips]
@@ -1358,6 +1362,10 @@ if { [istarget mips*-*-vxworks*] } {
!vr5400 !r5900 !octeon]
run_dump_test_arches "cp2-64" [mips_arch_list_matching mips3 \
!vr5400 !r5900 !octeon]
+ run_dump_test_arches "cp2b" [mips_arch_list_matching mips1 \
+ !mips32r6 !vr5400 !r5900 !octeon]
+ run_dump_test_arches "cp2bl" [mips_arch_list_matching mips2 \
+ !mips32r6 !vr5400 !r5900 !octeon]
run_dump_test_arches "cp2m" [mips_arch_list_matching mips1 \
!vr5400 !r5900 !octeon]
run_dump_test_arches "cp2d" [mips_arch_list_matching mips2 \
@@ -1365,6 +1373,10 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "cp3" [mips_arch_list_matching mips1 \
!mips3 !mips32r2 !micromips]
+ run_dump_test_arches "cp3b" [mips_arch_list_matching mips1 \
+ !mips3 !mips32r2 !micromips]
+ run_dump_test_arches "cp3bl" [mips_arch_list_matching mips2 \
+ !mips3 !mips32r2 !micromips]
run_dump_test_arches "cp3m" [mips_arch_list_matching mips1 \
!mips3 !mips32 !micromips]
run_dump_test_arches "cp3d" [mips_arch_list_matching mips2 \
generated by cgit v1.1 at 2025-01-04 01:22:19 +0000