aarch64: Remove version dependencies from features

Many instructions were enabled only when both a feature flag and a minimum
architecture version are specified.  This behaviour differs from GCC, which (in
most cases) allows features to be enabled at any architecture version.

There is no need for the toolchain to restrict combinations of unrelated
features in this way, so this patch removes the unnecessary dependencies.

13 files changed, 31 insertions, 28 deletions

diff --git a/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d b/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d
index d1cd753..f76d06d 100644
--- a/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d
+++ b/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d
@@ -1,3 +1,3 @@
-#as: -march=armv8.2-a+crypto+sm4+sha3
+#as: -march=armv8.2-a
 #source: armv8_2-a-illegal.s
 #error_output: armv8_2-a-illegal.l
diff --git a/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d b/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
index 244ba14..3916ac7 100644
--- a/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
+++ b/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+crypto+sm4+sha3+fp16fml
+#as: -march=armv8-a+crypto+sm4+sha3+fp16fml
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
index 37981bc..e6b5d69 100644
--- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.5-a+memtag
+#as: -march=armv8-a+memtag
 # objdump: -d
 
 .*: .*
diff --git a/gas/testsuite/gas/aarch64/dotproduct.d b/gas/testsuite/gas/aarch64/dotproduct.d
index fd2f0eb..fed6a5e 100644
--- a/gas/testsuite/gas/aarch64/dotproduct.d
+++ b/gas/testsuite/gas/aarch64/dotproduct.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+dotprod
+#as: -march=armv8-a+dotprod
 #as: -march=armv8.4-a
 #objdump: -dr
 
diff --git a/gas/testsuite/gas/aarch64/f32mm.d b/gas/testsuite/gas/aarch64/f32mm.d
index 0481852..a8c40c9 100644
--- a/gas/testsuite/gas/aarch64/f32mm.d
+++ b/gas/testsuite/gas/aarch64/f32mm.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.6-a+sve+f32mm
+#as: -march=armv8-a+sve+f32mm
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/f64mm.d b/gas/testsuite/gas/aarch64/f64mm.d
index 35c0853..395e597 100644
--- a/gas/testsuite/gas/aarch64/f64mm.d
+++ b/gas/testsuite/gas/aarch64/f64mm.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.6-a+sve+f64mm
+#as: -march=armv8-a+sve+f64mm
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/i8mm.d b/gas/testsuite/gas/aarch64/i8mm.d
index 04cd137..806e3c6 100644
--- a/gas/testsuite/gas/aarch64/i8mm.d
+++ b/gas/testsuite/gas/aarch64/i8mm.d
@@ -1,4 +1,5 @@
 #as: -march=armv8.6-a+sve
+#as: -march=armv8-a+sve+i8mm
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/illegal-dotproduct.d b/gas/testsuite/gas/aarch64/illegal-dotproduct.d
index 0e15b9f..e19babf 100644
--- a/gas/testsuite/gas/aarch64/illegal-dotproduct.d
+++ b/gas/testsuite/gas/aarch64/illegal-dotproduct.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+dotprod
+#as: -march=armv8-a+dotprod
 #as: -march=armv8.4-a
 #name: Invalid dotproduct instructions.
 #source: illegal-dotproduct.s
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.d b/gas/testsuite/gas/aarch64/illegal-memtag.d
index 913661a..782712d 100644
--- a/gas/testsuite/gas/aarch64/illegal-memtag.d
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.d
@@ -1,3 +1,3 @@
-#as: -march=armv8.5-a+memtag
+#as: -march=armv8-a+memtag
 #source: illegal-memtag.s
 #error_output: illegal-memtag.l
diff --git a/gas/testsuite/gas/aarch64/ls64-invalid.s b/gas/testsuite/gas/aarch64/ls64-invalid.s
index 151fe41..bbbbdd6 100644
--- a/gas/testsuite/gas/aarch64/ls64-invalid.s
+++ b/gas/testsuite/gas/aarch64/ls64-invalid.s
@@ -1,6 +1,6 @@
 /* Atomic 64-byte load/store instructions limit register number Rt to below
    condition: the <Xt> register number should be even and <= 22.  */
-.arch armv8.7-a+ls64
+.arch armv8-a+ls64
 
 /* Single-copy Atomic 64-byte Load.  */
 	ld64b x0, [x1]
diff --git a/gas/testsuite/gas/aarch64/ls64.s b/gas/testsuite/gas/aarch64/ls64.s
index 6116418..ad60f1c 100644
--- a/gas/testsuite/gas/aarch64/ls64.s
+++ b/gas/testsuite/gas/aarch64/ls64.s
@@ -1,5 +1,5 @@
 /* Atomic 64-byte load/store instructions.  */
-.arch armv8.6-a+ls64
+.arch armv8-a+ls64
 
 /* Single-copy Atomic 64-byte Load.  */
 	ld64b x0, [x1]
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx-mm.d b/gas/testsuite/gas/aarch64/sve-movprfx-mm.d
index f2b480d..0357a5a 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx-mm.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx-mm.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.6-a+f32mm+f64mm+sve
+#as: -march=armv8-a+i8mm+f32mm+f64mm+sve
 #objdump: -dr
 
 .* file format .*
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 2f8b19f..b7204e3 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2453,7 +2453,12 @@
   QLF3(V_4S, V_8H, S_H),	\
 }
 
-/* Opcode table.  */
+/* Opcode table.
+
+  Any SVE or SVE2 feature must include AARCH64_FEATURE_{SVE|SVE2} in its
+  bitmask, even if this is implied by other selected feature bits.  This
+  allows verify_constraints to identify SVE instructions when selecting an
+  error message for MOVPRFX constraint violations.  */
 
 static const aarch64_feature_set aarch64_feature_v8 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8, 0);
@@ -2488,7 +2493,7 @@ static const aarch64_feature_set aarch64_feature_compnum =
 static const aarch64_feature_set aarch64_feature_rcpc =
   AARCH64_FEATURE (AARCH64_FEATURE_RCPC, 0);
 static const aarch64_feature_set aarch64_feature_dotprod =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_DOTPROD, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_DOTPROD, 0);
 static const aarch64_feature_set aarch64_feature_sha2 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8 | AARCH64_FEATURE_SHA2, 0);
 static const aarch64_feature_set aarch64_feature_aes =
@@ -2496,14 +2501,14 @@ static const aarch64_feature_set aarch64_feature_aes =
 static const aarch64_feature_set aarch64_feature_v8_4 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_4, 0);
 static const aarch64_feature_set aarch64_feature_sm4 =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_SM4
-		   | AARCH64_FEATURE_SIMD | AARCH64_FEATURE_FP, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_SM4 | AARCH64_FEATURE_SIMD
+		   | AARCH64_FEATURE_FP, 0);
 static const aarch64_feature_set aarch64_feature_sha3 =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_SHA2
-		   | AARCH64_FEATURE_SHA3 | AARCH64_FEATURE_SIMD | AARCH64_FEATURE_FP, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_SHA3
+		   | AARCH64_FEATURE_SIMD | AARCH64_FEATURE_FP, 0);
 static const aarch64_feature_set aarch64_feature_fp_16_v8_2 =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16_FML
-		   | AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_F16_FML | AARCH64_FEATURE_F16
+		   | AARCH64_FEATURE_FP, 0);
 static const aarch64_feature_set aarch64_feature_v8_5 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_5, 0);
 static const aarch64_feature_set aarch64_feature_flagmanip =
@@ -2515,7 +2520,7 @@ static const aarch64_feature_set aarch64_feature_sb =
 static const aarch64_feature_set aarch64_feature_predres =
   AARCH64_FEATURE (AARCH64_FEATURE_PREDRES, 0);
 static const aarch64_feature_set aarch64_feature_memtag =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_5 | AARCH64_FEATURE_MEMTAG, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_MEMTAG, 0);
 static const aarch64_feature_set aarch64_feature_bfloat16 =
   AARCH64_FEATURE (AARCH64_FEATURE_BFLOAT16, 0);
 static const aarch64_feature_set aarch64_feature_bfloat16_sve =
@@ -2552,20 +2557,17 @@ static const aarch64_feature_set aarch64_feature_v8_6 =
 static const aarch64_feature_set aarch64_feature_v8_7 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_7, 0);
 static const aarch64_feature_set aarch64_feature_i8mm =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_I8MM, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_I8MM, 0);
 static const aarch64_feature_set aarch64_feature_i8mm_sve =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_I8MM
-       | AARCH64_FEATURE_SVE, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_I8MM | AARCH64_FEATURE_SVE, 0);
 static const aarch64_feature_set aarch64_feature_f32mm_sve =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F32MM
-       | AARCH64_FEATURE_SVE, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_F32MM | AARCH64_FEATURE_SVE, 0);
 static const aarch64_feature_set aarch64_feature_f64mm_sve =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F64MM
-       | AARCH64_FEATURE_SVE, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_F64MM | AARCH64_FEATURE_SVE, 0);
 static const aarch64_feature_set aarch64_feature_v8_r =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_R, 0);
 static const aarch64_feature_set aarch64_feature_ls64 =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_6 | AARCH64_FEATURE_LS64, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_LS64, 0);
 static const aarch64_feature_set aarch64_feature_flagm =
   AARCH64_FEATURE (AARCH64_FEATURE_FLAGM, 0);
 static const aarch64_feature_set aarch64_feature_mops =