Age | Commit message (Collapse) | Author | Files | Lines | |
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2024-04-26 | spike: Bump version from d1efcdf to 20a2b6d | Christoph Müllner | 1 | -0/+0 | |
``` ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv64gc/ lp64d/ medlow | 0 / 0 | 0 / 0 | - | rv32imafc/ ilp32f/ medlow | 0 / 0 | 0 / 0 | - | ``` Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> | |||||
2023-10-09 | Bump riscv-gnu-toolchain spike submodule to latest master commit d1efcdf | Tommy Murphy | 1 | -0/+0 | |
2023-06-30 | Revert "Revert "Address ↵ | Tommy Murphy | 1 | -0/+0 | |
https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1285"" This reverts commit 8b47422f03536918cd77971f936a925e3f4fe9e2. | |||||
2023-06-30 | Revert "Address https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1285" | Tommy Murphy | 1 | -0/+0 | |
This reverts commit a8a1fd8359243f683b4b7f08abf9ced0acaefb47. | |||||
2023-06-30 | Address https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1285 | Tommy Murphy | 1 | -0/+0 | |
2022-05-23 | Add option '--with-sim' to set simulator | Liaoshihua | 1 | -0/+0 | |