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Test results (with --enable-multilib):
```
========= Summary of gcc testsuite =========
| # of unexpected case / # of unique unexpected case
| gcc | g++ | gfortran |
rv32imac/ ilp32/ medlow | 0 / 0 | 0 / 0 | 0 / 0 |
rv32imafdc/ ilp32d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 |
rv64imac/ lp64/ medlow | 0 / 0 | 0 / 0 | 0 / 0 |
rv64imafdc/ lp64d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 |
```
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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Testing result (rv64):
```
========= Summary of gcc testsuite =========
| # of unexpected case / # of unique unexpected case
| gcc | g++ | gfortran |
rv64gc/ lp64d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 |
```
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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Due to multiple accidents while releasing GNU Binutils, version 2.41,
there are multiple tags that are broken.
The true commit representing the version 2.41 of GNU Binutils is
the head of `binutils-2_41-release-point` branch.
This commit partially reverts commit c7853bf388ff7ce7b67171302956ce78068d2342.
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As we prepare binutils for upstreaming we want to start closely tracking
upstream changes. There's a riscv-binutils-gdb repository that contains
the binutils port, and I want to centralize all the development there.
This commit uses that repository instead of the patches that used to
live here, so we're less likely to lose patches.
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Any 32-bit address is in range of both instructions in RV32.
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This just requires a single extra argument to a function call, which I copied
from aarch64. I've only tested that newlib builds, but I don't see how this
could cause any problems... :)
I was hoping this would help with my attempts to integrate the GDB and binutils
ports into one repo for upstreaming, but it looks like 2.25.1 is still a bit
too old for this.
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There is no such instruction.
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Section merging could make a gp-relative reference go out of range
after relaxation. Stop relaxing LUIs against mergeable symbols, and
add error checking to catch things like this in the future.
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- Merge RVC flag correctly
- Add soft-float flag and enforce equality when merging objects
- Don't use flags to indicate custom accelerators (ultimate solution TBD)
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Fixes: 1ee4364dc4d9 ("binutils: clean up style")
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This doesn't fix all the problems, but does clean up many of them to make
the code conform better to the GNU style.
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We sometimes use t0 as a link register, e.g. for the compressed prologues
and epilogues, and so we want microarchitectures to push the RAS when
rd=t0 and pop the RAS when rs1=t0. Thus, we want to avoid using t0 for
indirect calls to avoid errant RAS operations.
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If a call crosses an alignment directive, the PC-relative offset could
actually increase post-relaxation. Account for this by assuming the
offset could increase by up to a page size when the caller and callee
lie in different output sections.
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It turns out LD runs relax_section multiple times even if *again is false.
We need to use our own mechanism to prevent relaxing a section again
after R_RISCV_ALIGN has been handled, or else we can break alignment.
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h/t Matt Thomas
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Calls to the range [-2048,-2] can now be relaxed to JALR w.r.t. x0.
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Later bfd passes may assume this has been done.
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ld.so was using a non-PIC reloc to get the link-time address of _DYNAMIC,
which, while correct, causes the library to be flagged DT_TEXTREL. Avoid
this by leveraging the fact that the static linker has put the link-time
address of _DYNAMIC in the first GOT entry.
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We over-emit NOPs in the assembler, then delete them in the linker to achieve
the required alignment. This allows alignment to work in spite of other
linker relaxations.
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I think there were a few off-by-one errors. If so, they exist in other
backends, too, since relax_delete_bytes was cribbed from SH.
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Since a lot of code is dependent on the word size, it's both simpler and
more efficient to put that code in elfnn-riscv.c. Only code that does not
depend on the word size remains in elfxx-riscv.c.
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The latter is preprocessed to replace the string NN with 32 or 64 as needed.
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