diff options
| -rw-r--r-- | binutils/gas/config/tc-riscv.c | 3 | ||||
| -rw-r--r-- | binutils/include/elf/riscv.h | 3 | ||||
| -rw-r--r-- | patches/binutils | 18 |
3 files changed, 17 insertions, 7 deletions
diff --git a/binutils/gas/config/tc-riscv.c b/binutils/gas/config/tc-riscv.c index 0faad26..a49dfd5 100644 --- a/binutils/gas/config/tc-riscv.c +++ b/binutils/gas/config/tc-riscv.c @@ -1930,6 +1930,9 @@ riscv_after_parse_args (void) { if (riscv_subsets == NULL) riscv_set_arch ("RVIMAFDXcustom"); + + if (riscv_opts.rvc) + elf_flags |= EF_RISCV_RVC; } void diff --git a/binutils/include/elf/riscv.h b/binutils/include/elf/riscv.h index a1e9bb6..bb99554 100644 --- a/binutils/include/elf/riscv.h +++ b/binutils/include/elf/riscv.h @@ -80,6 +80,9 @@ END_RELOC_NUMBERS (R_RISCV_max) /* Processor specific flags for the ELF header e_flags field. */ +/* File may contain compressed instructions. */ +#define EF_RISCV_RVC 0x0001 + /* Custom flag definitions. */ #define EF_RISCV_EXT_MASK 0xffff diff --git a/patches/binutils b/patches/binutils index 2968946..f07c2cd 100644 --- a/patches/binutils +++ b/patches/binutils @@ -219,22 +219,26 @@ case EM_RL78: return "Renesas RL78"; case EM_RX: return "Renesas RX"; case EM_METAG: return "Imagination Technologies Meta processor architecture"; -@@ -2951,6 +2958,14 @@ get_machine_flags (unsigned e_flags, uns +@@ -2951,6 +2958,18 @@ get_machine_flags (unsigned e_flags, uns decode_NDS32_machine_flags (e_flags, buf, sizeof buf); break; + case EM_RISCV: + { -+ unsigned int riscv_extension = EF_GET_RISCV_EXT(e_flags); -+ strcat (buf, ", "); -+ strcat (buf, riscv_elf_flag_to_name (riscv_extension)); ++ if (e_flags & EF_RISCV_RVC) ++ strcat (buf, ", RVC"); ++ ++ if (!EF_GET_RISCV_EXT (e_flags)) ++ break; ++ strcat (buf, ", "); ++ strcat (buf, riscv_elf_flag_to_name (EF_GET_RISCV_EXT (e_flags))); + } + break; + case EM_SH: switch ((e_flags & EF_SH_MACH_MASK)) { -@@ -10789,6 +10804,8 @@ is_32bit_abs_reloc (unsigned int reloc_t +@@ -10789,6 +10808,8 @@ is_32bit_abs_reloc (unsigned int reloc_t return reloc_type == 1; /* R_PPC64_ADDR32. */ case EM_PPC: return reloc_type == 1; /* R_PPC_ADDR32. */ @@ -243,7 +247,7 @@ case EM_RL78: return reloc_type == 1; /* R_RL78_DIR32. */ case EM_RX: -@@ -10924,6 +10941,8 @@ is_64bit_abs_reloc (unsigned int reloc_t +@@ -10924,6 +10945,8 @@ is_64bit_abs_reloc (unsigned int reloc_t return reloc_type == 80; /* R_PARISC_DIR64. */ case EM_PPC64: return reloc_type == 38; /* R_PPC64_ADDR64. */ @@ -252,7 +256,7 @@ case EM_SPARC32PLUS: case EM_SPARCV9: case EM_SPARC: -@@ -11072,6 +11091,7 @@ is_none_reloc (unsigned int reloc_type) +@@ -11072,6 +11095,7 @@ is_none_reloc (unsigned int reloc_type) case EM_ADAPTEVA_EPIPHANY: case EM_PPC: /* R_PPC_NONE. */ case EM_PPC64: /* R_PPC64_NONE. */ |