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| author | Andrew Waterman <andrew@sifive.com> | 2016-12-12 21:18:15 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2016-12-12 21:39:36 -0800 |
| commit | 9304da8abae83b372d629218f79d6a71e3d2824c (patch) | |
| tree | 5e1f3c8fc9adc083a22e8da6966e0ad4e126a5e2 /linux-headers/include/misc | |
| parent | 15f25ba05276fcb1d2e56a13f0f9c1c2e3611765 (diff) | |
| download | riscv-gnu-toolchain-9304da8abae83b372d629218f79d6a71e3d2824c.zip riscv-gnu-toolchain-9304da8abae83b372d629218f79d6a71e3d2824c.tar.gz riscv-gnu-toolchain-9304da8abae83b372d629218f79d6a71e3d2824c.tar.bz2 | |
bump linux headers to 4.6.2
Diffstat (limited to 'linux-headers/include/misc')
| -rw-r--r-- | linux-headers/include/misc/cxl.h | 50 |
1 files changed, 49 insertions, 1 deletions
diff --git a/linux-headers/include/misc/cxl.h b/linux-headers/include/misc/cxl.h index 9514f6c..dff93a1 100644 --- a/linux-headers/include/misc/cxl.h +++ b/linux-headers/include/misc/cxl.h @@ -29,13 +29,61 @@ struct cxl_ioctl_start_work { #define CXL_START_WORK_AMR 0x0000000000000001ULL #define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL +#define CXL_START_WORK_ERR_FF 0x0000000000000004ULL #define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\ - CXL_START_WORK_NUM_IRQS) + CXL_START_WORK_NUM_IRQS |\ + CXL_START_WORK_ERR_FF) + + +/* Possible modes that an afu can be in */ +#define CXL_MODE_DEDICATED 0x1 +#define CXL_MODE_DIRECTED 0x2 + +/* possible flags for the cxl_afu_id flags field */ +#define CXL_AFUID_FLAG_SLAVE 0x1 /* In directed-mode afu is in slave mode */ + +struct cxl_afu_id { + __u64 flags; /* One of CXL_AFUID_FLAG_X */ + __u32 card_id; + __u32 afu_offset; + __u32 afu_mode; /* one of the CXL_MODE_X */ + __u32 reserved1; + __u64 reserved2; + __u64 reserved3; + __u64 reserved4; + __u64 reserved5; + __u64 reserved6; +}; + +/* base adapter image header is included in the image */ +#define CXL_AI_NEED_HEADER 0x0000000000000001ULL +#define CXL_AI_ALL CXL_AI_NEED_HEADER + +#define CXL_AI_HEADER_SIZE 128 +#define CXL_AI_BUFFER_SIZE 4096 +#define CXL_AI_MAX_ENTRIES 256 +#define CXL_AI_MAX_CHUNK_SIZE (CXL_AI_BUFFER_SIZE * CXL_AI_MAX_ENTRIES) + +struct cxl_adapter_image { + __u64 flags; + __u64 data; + __u64 len_data; + __u64 len_image; + __u64 reserved1; + __u64 reserved2; + __u64 reserved3; + __u64 reserved4; +}; /* ioctl numbers */ #define CXL_MAGIC 0xCA +/* AFU devices */ #define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work) #define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32) +#define CXL_IOCTL_GET_AFU_ID _IOR(CXL_MAGIC, 0x02, struct cxl_afu_id) +/* adapter devices */ +#define CXL_IOCTL_DOWNLOAD_IMAGE _IOW(CXL_MAGIC, 0x0A, struct cxl_adapter_image) +#define CXL_IOCTL_VALIDATE_IMAGE _IOW(CXL_MAGIC, 0x0B, struct cxl_adapter_image) #define CXL_READ_MIN_SIZE 0x1000 /* 4K */ |