gcc: simplify cost model (fixes #75)

3 files changed, 31 insertions, 109 deletions

diff --git a/gcc/gcc/config/riscv/generic.md b/gcc/gcc/config/riscv/generic.md
index a6dc8fa..b2b0a42 100644
--- a/gcc/gcc/config/riscv/generic.md
+++ b/gcc/gcc/config/riscv/generic.md
@@ -20,79 +20,59 @@
 ;; <http://www.gnu.org/licenses/>.
 
 
-;; This file is derived from the old define_function_unit description.
-;; Each reservation can be overridden on a processor-by-processor basis.
+(define_automaton "pipe0")
+(define_cpu_unit "alu" "pipe0")
+(define_cpu_unit "imuldiv" "pipe0")
+(define_cpu_unit "fdivsqrt" "pipe0")
 
 (define_insn_reservation "generic_alu" 1
   (eq_attr "type" "unknown,const,arith,shift,slt,multi,nop,logical,move")
   "alu")
 
 (define_insn_reservation "generic_load" 3
-  (eq_attr "type" "load,fpload,fpidxload")
+  (eq_attr "type" "load,fpload")
   "alu")
 
 (define_insn_reservation "generic_store" 1
-  (eq_attr "type" "store,fpstore,fpidxstore")
+  (eq_attr "type" "store,fpstore")
   "alu")
 
-(define_insn_reservation "generic_xfer" 2
-  (eq_attr "type" "mfc,mtc")
+(define_insn_reservation "generic_xfer" 3
+  (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp")
   "alu")
 
 (define_insn_reservation "generic_branch" 1
   (eq_attr "type" "branch,jump,call")
   "alu")
 
-(define_insn_reservation "generic_imul" 17
+(define_insn_reservation "generic_imul" 10
   (eq_attr "type" "imul")
-  "imuldiv*17")
+  "imuldiv*10")
 
-(define_insn_reservation "generic_idiv" 38
-  (eq_attr "type" "idiv")
-  "imuldiv*38")
+(define_insn_reservation "generic_idivsi" 34
+  (and (eq_attr "type" "idiv")
+       (eq_attr "mode" "SI"))
+  "imuldiv*34")
 
-(define_insn_reservation "generic_fcvt" 1
-  (eq_attr "type" "fcvt")
-  "alu")
-
-(define_insn_reservation "generic_fmove" 2
-  (eq_attr "type" "fmove")
-  "alu")
-
-(define_insn_reservation "generic_fcmp" 3
-  (eq_attr "type" "fcmp")
-  "alu")
+(define_insn_reservation "generic_idivdi" 66
+  (and (eq_attr "type" "idiv")
+       (eq_attr "mode" "DI"))
+  "imuldiv*66")
 
-(define_insn_reservation "generic_fadd" 4
-  (eq_attr "type" "fadd")
-  "alu")
-
-(define_insn_reservation "generic_fmul_single" 7
-  (and (eq_attr "type" "fmul,fmadd")
+(define_insn_reservation "generic_fmul_single" 5
+  (and (eq_attr "type" "fadd,fmul,fmadd")
        (eq_attr "mode" "SF"))
   "alu")
 
-(define_insn_reservation "generic_fmul_double" 8
-  (and (eq_attr "type" "fmul,fmadd")
+(define_insn_reservation "generic_fmul_double" 7
+  (and (eq_attr "type" "fadd,fmul,fmadd")
        (eq_attr "mode" "DF"))
   "alu")
 
-(define_insn_reservation "generic_fdiv_single" 23
-  (and (eq_attr "type" "fdiv")
-       (eq_attr "mode" "SF"))
-  "alu")
+(define_insn_reservation "generic_fdiv" 20
+  (eq_attr "type" "fdiv")
+  "fdivsqrt*20")
 
-(define_insn_reservation "generic_fdiv_double" 36
-  (and (eq_attr "type" "fdiv")
-       (eq_attr "mode" "DF"))
-  "alu")
-
-(define_insn_reservation "generic_fsqrt_single" 54
-  (and (eq_attr "type" "fsqrt")
-       (eq_attr "mode" "SF"))
-  "alu")
-
-(define_insn_reservation "generic_fsqrt_double" 112
-  (and (eq_attr "type" "fsqrt")
-       (eq_attr "mode" "DF"))
-  "alu")
+(define_insn_reservation "generic_fsqrt" 25
+  (eq_attr "type" "fsqrt")
+  "fdivsqrt*25")
diff --git a/gcc/gcc/config/riscv/riscv.c b/gcc/gcc/config/riscv/riscv.c
index 9248f15..979ee8f 100644
--- a/gcc/gcc/config/riscv/riscv.c
+++ b/gcc/gcc/config/riscv/riscv.c
@@ -301,7 +301,6 @@ struct riscv_tune_info
   unsigned short int_div[2];
   unsigned short issue_rate;
   unsigned short branch_cost;
-  unsigned short fp_to_int_cost;
   unsigned short memory_cost;
 };
 
@@ -363,7 +362,6 @@ static const struct riscv_tune_info rocket_tune_info = {
   {COSTS_N_INSNS (6), COSTS_N_INSNS (6)},	/* int_div */
   1,						/* issue_rate */
   3,						/* branch_cost */
-  COSTS_N_INSNS (2),				/* fp_to_int_cost */
   5						/* memory_cost */
 };
 
@@ -376,7 +374,6 @@ static const struct riscv_tune_info optimize_size_tune_info = {
   {COSTS_N_INSNS (1), COSTS_N_INSNS (1)},	/* int_div */
   1,						/* issue_rate */
   1,						/* branch_cost */
-  COSTS_N_INSNS (1),				/* fp_to_int_cost */
   1						/* memory_cost */
 };
 
@@ -3655,28 +3652,6 @@ riscv_canonicalize_move_class (reg_class_t rclass)
   return rclass;
 }
 
-/* Implement TARGET_REGISTER_MOVE_COST.  Return 0 for classes that are the
-   maximum of the move costs for subclasses; regclass will work out
-   the maximum for us.  */
-
-static int
-riscv_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
-			 reg_class_t from, reg_class_t to)
-{
-  from = riscv_canonicalize_move_class (from);
-  to = riscv_canonicalize_move_class (to);
-
-  if ((from == GENERAL_REGS && to == GENERAL_REGS)
-      || (from == GENERAL_REGS && to == FP_REGS)
-      || (from == FP_REGS && to == FP_REGS))
-    return COSTS_N_INSNS (1);
-
-  if (from == FP_REGS && to == GENERAL_REGS)
-    return tune_info->fp_to_int_cost;
-
-  return 0;
-}
-
 /* Implement TARGET_MEMORY_MOVE_COST.  */
 
 static int
@@ -3752,18 +3727,6 @@ riscv_scalar_mode_supported_p (enum machine_mode mode)
   return default_scalar_mode_supported_p (mode);
 }
 
-/* Implement TARGET_SCHED_ADJUST_COST.  We assume that anti and output
-   dependencies have no cost. */
-
-static int
-riscv_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
-		   rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
-{
-  if (REG_NOTE_KIND (link) != 0)
-    return 0;
-  return cost;
-}
-
 /* Return the number of instructions that can be issued per cycle.  */
 
 static int
@@ -4325,16 +4288,12 @@ riscv_lra_p (void)
 #undef TARGET_LEGITIMIZE_ADDRESS
 #define TARGET_LEGITIMIZE_ADDRESS riscv_legitimize_address
 
-#undef TARGET_SCHED_ADJUST_COST
-#define TARGET_SCHED_ADJUST_COST riscv_adjust_cost
 #undef TARGET_SCHED_ISSUE_RATE
 #define TARGET_SCHED_ISSUE_RATE riscv_issue_rate
 
 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
 #define TARGET_FUNCTION_OK_FOR_SIBCALL riscv_function_ok_for_sibcall
 
-#undef TARGET_REGISTER_MOVE_COST
-#define TARGET_REGISTER_MOVE_COST riscv_register_move_cost
 #undef TARGET_MEMORY_MOVE_COST
 #define TARGET_MEMORY_MOVE_COST riscv_memory_move_cost
 #undef TARGET_RTX_COSTS
diff --git a/gcc/gcc/config/riscv/riscv.md b/gcc/gcc/config/riscv/riscv.md
index 0ae09b9..450a098 100644
--- a/gcc/gcc/config/riscv/riscv.md
+++ b/gcc/gcc/config/riscv/riscv.md
@@ -109,10 +109,8 @@
 ;; call		unconditional call
 ;; load		load instruction(s)
 ;; fpload	floating point load
-;; fpidxload    floating point indexed load
 ;; store	store instruction(s)
 ;; fpstore	floating point store
-;; fpidxstore	floating point indexed store
 ;; mtc		transfer to coprocessor
 ;; mfc		transfer from coprocessor
 ;; const	load constant
@@ -135,7 +133,7 @@
 ;; nop		no operation
 ;; ghost	an instruction that produces no real code
 (define_attr "type"
-  "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,
+  "unknown,branch,jump,call,load,fpload,store,fpstore,
    mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul,
    fmadd,fdiv,fcmp,fcvt,fsqrt,multi,nop,ghost"
   (cond [(eq_attr "jal" "!unset") (const_string "call")
@@ -383,29 +381,12 @@
 			(plus "add")
 			(minus "sub")])
 
-;; Pipeline descriptions.
-;;
-;; generic.md provides a fallback for processors without a specific
-;; pipeline description.  It is derived from the old define_function_unit
-;; version and uses the "alu" and "imuldiv" units declared below.
-;;
-;; Some of the processor-specific files are also derived from old
-;; define_function_unit descriptions and simply override the parts of
-;; generic.md that don't apply.  The other processor-specific files
-;; are self-contained.
-(define_automaton "alu,imuldiv")
-
-(define_cpu_unit "alu" "alu")
-(define_cpu_unit "imuldiv" "imuldiv")
-
 ;; Ghost instructions produce no real code and introduce no hazards.
 ;; They exist purely to express an effect on dataflow.
 (define_insn_reservation "ghost" 0
   (eq_attr "type" "ghost")
   "nothing")
 
-(include "generic.md")
-
 ;;
 ;;  ....................
 ;;
@@ -2034,6 +2015,7 @@
 {
   if (GET_CODE (operands[1]) != NE)
     return "f%C1.<fmt>\t%0,%2,%3";
+  return "#";
 }
   ""
   [(set (match_dup 0) (eq:SI (match_dup 2) (match_dup 3)))
@@ -2453,3 +2435,4 @@
 
 (include "sync.md")
 (include "peephole.md")
+(include "generic.md")