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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-05-23 15:40:47 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-05-27 12:30:13 -0700 |
| commit | 24565255e250769a2aa7203872d693eb9083d272 (patch) | |
| tree | c2f870fcf1336f2802d00010053c9cd539c62ba4 /gcc | |
| parent | 0f0d5254dcad2d5506e14f969e279c7a502ae8b5 (diff) | |
| download | riscv-gnu-toolchain-24565255e250769a2aa7203872d693eb9083d272.zip riscv-gnu-toolchain-24565255e250769a2aa7203872d693eb9083d272.tar.gz riscv-gnu-toolchain-24565255e250769a2aa7203872d693eb9083d272.tar.bz2 | |
gcc: add experimental -mrvc flag to enable RVC
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/gcc/common/config/riscv/riscv-common.c | 4 | ||||
| -rw-r--r-- | gcc/gcc/config/riscv/riscv.h | 3 | ||||
| -rw-r--r-- | gcc/gcc/config/riscv/riscv.opt | 4 |
3 files changed, 10 insertions, 1 deletions
diff --git a/gcc/gcc/common/config/riscv/riscv-common.c b/gcc/gcc/common/config/riscv/riscv-common.c index 7fde69a..2186b2b 100644 --- a/gcc/gcc/common/config/riscv/riscv-common.c +++ b/gcc/gcc/common/config/riscv/riscv-common.c @@ -72,6 +72,10 @@ riscv_parse_arch_string (const char *isa, int *flags) return; } + *flags &= ~MASK_RVC; + if (*p == 'C') + *flags |= MASK_RVC, p++; + if (*p) { error ("-march=%s: unsupported ISA substring %s", isa, p); diff --git a/gcc/gcc/config/riscv/riscv.h b/gcc/gcc/config/riscv/riscv.h index 3de70b5..2026b71 100644 --- a/gcc/gcc/config/riscv/riscv.h +++ b/gcc/gcc/config/riscv/riscv.h @@ -168,6 +168,7 @@ along with GCC; see the file COPYING3. If not see #define ASM_SPEC "\ %(subtarget_asm_debugging_spec) \ %{m32} %{m64} %{!m32:%{!m64: %(asm_abi_default_spec)}} \ +%{mrvc} \ %{fPIC|fpic|fPIE|fpie:-fpic} \ %{march=*} \ %(subtarget_asm_spec)" @@ -285,7 +286,7 @@ along with GCC; see the file COPYING3. If not see #define PARM_BOUNDARY BITS_PER_WORD /* Allocation boundary (in *bits*) for the code of a function. */ -#define FUNCTION_BOUNDARY 32 +#define FUNCTION_BOUNDARY (TARGET_RVC ? 16 : 32) /* There is no point aligning anything to a rounder boundary than this. */ #define BIGGEST_ALIGNMENT 128 diff --git a/gcc/gcc/config/riscv/riscv.opt b/gcc/gcc/config/riscv/riscv.opt index b374a42..e548935 100644 --- a/gcc/gcc/config/riscv/riscv.opt +++ b/gcc/gcc/config/riscv/riscv.opt @@ -70,6 +70,10 @@ mmuldiv Target Report Mask(MULDIV) Use hardware instructions for integer multiplication and division. +mrvc +Target Report Mask(RVC) +Use compressed instruction encoding + mlra Target Report Var(riscv_lra_flag) Init(0) Save Use LRA instead of reload |