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AgeCommit message (Expand)AuthorFilesLines
2020-04-14encoding: add new VCSR for vector 0.9Chih-Min Chao3-2/+7
2020-04-14encoding: update csr definitionChih-Min Chao1-2/+30
2020-04-14encoding: use unified ordering to avoid library changeChih-Min Chao1-258/+327
2020-03-05enable vector unit in V environment (#20)Han-Kuan Chen1-0/+3
2020-03-04Initialize x registers in p, pm, pt rather than just v (#21)Andrew Waterman1-1/+35
2020-03-02restore mtvec (#19)Han-Kuan Chen1-1/+1
2020-02-27Enable vector unit in V environment by defaultAndrew Waterman1-2/+2
2020-02-27Update encoding.hAndrew Waterman1-15/+1244
2020-02-24Fix #17 (#18)Paul Donahue1-2/+0
2019-12-16Initialize all the x-registers for determinismAndrew Waterman1-0/+32
2019-12-02Merge pull request #15 from chihminchao/ecall_and_vectorAndrew Waterman2-0/+22
2019-11-28rvv: add mstatus.vs definition and initial mcaroChih-Min Chao2-0/+18
2019-11-28fill exit syscall information to make semihosting workChih-Min Chao1-0/+4
2019-08-15Don't truncate the LFSR to 32 bitsAndrew Waterman1-2/+2
2019-02-19Support testing Sv48 with -DSv48 optionAndrew Waterman1-21/+47
2019-01-04Align entry points for RVC compilationAndrew Waterman1-0/+4
2018-09-23Avoid writing reserved values to pmpaddr CSRAndrew Waterman2-2/+4
2018-09-06Enable EXTRA_INIT macro to work in VM environment (#10)Michael McKeown2-0/+5
2017-11-27Rename sptbr to satpAndrew Waterman3-25/+25
2017-08-16Merge pull request #4 from riscv/sfence_memoryPalmer Dabbelt1-1/+1
2017-08-16Inform GCC that "sfence.vma" clobbers memoryPalmer Dabbelt1-1/+1
2017-07-03Fix physical load address for recent binutilspriv-1.10Andrew Waterman1-3/+6
2017-05-05bump encoding.hAndrew Waterman1-0/+3
2017-05-01Set ELF entry point correctlyAndrew Waterman3-11/+9
2017-03-30New PMP encodingAndrew Waterman3-7/+8
2017-03-29Test sstatus.SUM more thoroughly by keeping it usually disabledAndrew Waterman1-1/+6
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman3-17/+22
2017-03-24Clean up physical memory test init codeAndrew Waterman1-5/+20
2017-03-24Avoid misa in physical memory testsAndrew Waterman1-2/+2
2017-03-23Align mtvec targetAndrew Waterman1-0/+1
2017-03-23Rely on assembler to provide PMP CSRsAndrew Waterman2-7/+6
2017-03-21Use gp for TESTNUM, so compiled C code won't touch itAndrew Waterman1-1/+1
2017-03-21Set up PMP if presentAndrew Waterman3-7/+71
2017-03-13Update encodingAndrew Waterman1-0/+3
2017-03-09WIP on priv-1.10Andrew Waterman3-61/+177
2017-03-02Check XLEN only after initializing mtvecAndrew Waterman1-1/+1
2016-12-06avoid non-standard predefined macrosAndrew Waterman5-10/+6
2016-08-26Disable interrupts during VM testsAndrew Waterman1-2/+3
2016-08-26Update encodingAndrew Waterman1-72/+341
2016-08-17Avoid division in VM testsAndrew Waterman2-6/+6
2016-08-15add ALIGN after .tohost to prevent placing MMIO and data on same page (#3)Sagar Karandikar1-1/+1
2016-07-11Align mtvec to support RVCAndrew Waterman1-0/+1
2016-07-07Delegate interrupts to supervisor for supervisor testsAndrew Waterman1-0/+5
2016-07-06Update to new PTE formatAndrew Waterman2-46/+19
2016-06-15Speed up VM testsAndrew Waterman3-9/+27
2016-06-09Update encoding.hAndrew Waterman1-8/+15
2016-06-08Update encoding.hAndrew Waterman1-0/+50
2016-05-25Keep tohost/fromhost at deterministic addressAndrew Waterman4-7/+10
2016-05-03Fix multicore VM testsAndrew Waterman3-8/+5
2016-05-02Stop using mtohost/mfromhost registersAndrew Waterman3-32/+23
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