Remove Hwacha v3 support

3 files changed, 2 insertions, 178 deletions

diff --git a/v/entry.S b/v/entry.S
index 8fa19f7..ea05e73 100644
--- a/v/entry.S
+++ b/v/entry.S
@@ -130,34 +130,8 @@ trap_entry:
   csrr   t0,scause
   STORE  t0,35*REGBYTES(sp)
 
-  # get hwacha cause if IRQ_COP
-  # vxcptcause clears hwacha interrupt bit
-
-  bgez  t0,1f
-  slli  t0,t0,1 # clearing MSB of cause
-  srli  t0,t0,1 # clearing MSB of cause
-  li    t1,IRQ_COP
-  bne   t0,t1,1f
-  vxcptcause t0
-  STORE  t0,36*REGBYTES(sp)
-1:
-
   move  a0, sp
-  csrr  t0, sstatus
-  li    t1, SSTATUS_XS
-  and   t0, t0, t1
-  beqz  t0, 2f
-
-  # disable saving vector state for now
-  addi  t0,sp,SIZEOF_TRAPFRAME_T_SCALAR
-
-  vgetcfg x4
-  STORE x4,0*REGBYTES(t0)
-  vgetvl x4
-  STORE x4,1*REGBYTES(t0)
-  addi  t0,t0,2*REGBYTES
-  vxcptevac t0
-2:j handle_trap
+  j handle_trap
 
   .global do_tohost
 do_tohost:
diff --git a/v/riscv_test.h b/v/riscv_test.h
index 1b38b5a..6734713 100644
--- a/v/riscv_test.h
+++ b/v/riscv_test.h
@@ -12,10 +12,6 @@
 #undef RVTEST_FP_ENABLE
 #define RVTEST_FP_ENABLE fssr x0
 
-#undef RVTEST_RV64UV
-#define RVTEST_RV64UV                                                   \
-        RVTEST_RV64UF
-
 #undef RVTEST_CODE_BEGIN
 #define RVTEST_CODE_BEGIN                                               \
         .text;                                                          \
@@ -48,92 +44,16 @@ userstart:                                                              \
 // Supervisor mode definitions and macros
 //-----------------------------------------------------------------------
 
-#define dword_bit_cmd(dw) ((dw >> 32) & 0x1)
-#define dword_bit_cnt(dw) (!dword_bit_cmd(dw))
-#define dword_bit_imm1(dw) ((dw >> 35) & 0x1)
-#define dword_bit_imm2(dw) ((dw >> 34) & 0x1)
-#define dword_bit_pf(dw) ((dw >> 36) & 0x1)
-
-#define fence() ({ \
-          asm volatile ("fence" ::: "memory"); })
-
-#define vxcptkill() ({ \
-          asm volatile ("vxcptkill"); })
-
-#define vxcpthold(addr) ({ \
-          asm volatile ("vxcpthold %0" : : "r"(addr)); })
-
-#define venqcmd(bits, pf) ({ \
-          asm volatile ("venqcmd %0,%1" : : "r"(bits), "r"(pf)); })
-
-#define venqimm1(bits, pf) ({ \
-          asm volatile ("venqimm1 %0,%1" : : "r"(bits), "r"(pf)); })
-
-#define venqimm2(bits, pf) ({ \
-          asm volatile ("venqimm2 %0,%1" : : "r"(bits), "r"(pf)); })
- 
-#define venqcnt(bits, pf) ({ \
-          asm volatile ("venqcnt %0,%1" :: "r"(bits), "r"(pf)); })
-
 #define MAX_TEST_PAGES 63 // this must be the period of the LFSR below
 #define LFSR_NEXT(x) (((((x)^((x)>>1)) & 1) << 5) | ((x) >> 1))
 
 #define PGSHIFT 12
 #define PGSIZE (1UL << PGSHIFT)
 
-#define SIZEOF_TRAPFRAME_T 20776
-#define SIZEOF_TRAPFRAME_T_SCALAR 296
+#define SIZEOF_TRAPFRAME_T 288
 
 #ifndef __ASSEMBLER__
 
-static inline void vsetcfg(long cfg)
-{
-  asm volatile ("vsetcfg %0" : : "r"(cfg));
-}
-
-static inline void vsetvl(long vl)
-{
-  long __tmp;
-  asm volatile ("vsetvl %0,%1" : "=r"(__tmp) : "r"(vl));
-}
-
-static inline long vgetcfg()
-{
-  int cfg;
-  asm volatile ("vgetcfg %0" : "=r"(cfg) :);
-  return cfg;
-}
-
-static inline long vgetvl()
-{
-  int vl;
-  asm volatile ("vgetvl %0" : "=r"(vl) :);
-}
-
-static inline long vxcptaux()
-{
-  long aux;
-  asm volatile ("vxcptaux %0" : "=r"(aux) :);
-  return aux;
-}
-
-static inline long vxcptcause()
-{
-  long cause;
-  asm volatile ("vxcptcause %0" : "=r"(cause) :);
-  return cause;
-}
-
-static inline void vxcptrestore(long* mem)
-{
-  asm volatile("vxcptrestore %0" : : "r"(mem) : "memory");
-}
-
-static inline void vxcptevac(long* mem)
-{
-  asm volatile ("vxcptevac %0" : : "r"(mem));
-}
-
 typedef unsigned long pte_t;
 #define LEVELS (sizeof(pte_t) == sizeof(uint64_t) ? 3 : 2)
 #define PTIDXBITS (PGSHIFT - (sizeof(pte_t) == 8 ? 3 : 2))
@@ -149,8 +69,6 @@ typedef struct
   long epc;
   long badvaddr;
   long cause;
-  long hwacha_cause;
-  long hwacha_opaque[2560];
 } trapframe_t;
 #endif
 
diff --git a/v/vm.c b/v/vm.c
index 74abadd..7b5ba6c 100644
--- a/v/vm.c
+++ b/v/vm.c
@@ -115,59 +115,6 @@ void handle_fault(unsigned long addr)
   __builtin___clear_cache(0,0);
 }
 
-static void do_vxcptrestore(long* where)
-{
-  vsetcfg(where[0]);
-  vsetvl(where[1]);
-
-  vxcpthold(&where[2]);
-
-  int idx = 2;
-  long dword, cmd, pf;
-  int first = 1;
-
-  while (1)
-  {
-    dword = where[idx++];
-
-    if (dword < 0) break;
-
-    if (dword_bit_cnt(dword))
-    {
-      venqcnt(dword, pf | (dword_bit_cmd(where[idx]) << 1));
-    }
-    else
-    {
-      if (!first)
-      {
-        venqcmd(cmd, pf);
-      }
-
-      first = 0;
-      cmd = dword;
-      pf = dword_bit_pf(cmd);
-
-      if (dword_bit_imm1(cmd))
-      {
-        venqimm1(where[idx++], pf);
-      }
-      if (dword_bit_imm2(cmd))
-      {
-        venqimm2(where[idx++], pf);
-      }
-    }
-  }
-  if (!first)
-  {
-    venqcmd(cmd, pf);
-  }
-}
-
-static void restore_vector(trapframe_t* tf)
-{
-  do_vxcptrestore(tf->hwacha_opaque);
-}
-
 void handle_trap(trapframe_t* tf)
 {
   if (tf->cause == CAUSE_USER_ECALL)
@@ -196,24 +143,9 @@ void handle_trap(trapframe_t* tf)
   }
   else if (tf->cause == CAUSE_FAULT_LOAD || tf->cause == CAUSE_FAULT_STORE)
     handle_fault(tf->badvaddr);
-  else if ((long)tf->cause < 0 && (uint8_t)tf->cause == IRQ_COP)
-  {
-    if (tf->hwacha_cause == HWACHA_CAUSE_VF_FAULT_FETCH ||
-        tf->hwacha_cause == HWACHA_CAUSE_FAULT_LOAD ||
-        tf->hwacha_cause == HWACHA_CAUSE_FAULT_STORE)
-    {
-      long badvaddr = vxcptaux();
-      handle_fault(badvaddr);
-    }
-    else
-      assert(!"unexpected interrupt");
-  }
   else
     assert(!"unexpected exception");
 
-out:
-  if (!(tf->sr & SSTATUS_PS) && (tf->sr & SSTATUS_XS))
-    restore_vector(tf);
   pop_tf(tf);
 }