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authorJerry Zhao <qwertyuiopghb@gmail.com>2023-08-22 21:42:55 -0700
committerGitHub <noreply@github.com>2023-08-22 21:42:55 -0700
commit1c577dc7c7d6aee27b8d5cb0e2e87c8473e3ad12 (patch)
treeb9f1477e7cfc9125d97aea2f1ac59b7817d05cf7
parent4fabfb4e0d3eacc1dc791da70e342e4b68ea7e46 (diff)
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Support setting V-env LFSR bits with a compiler flag (#43)HEADmaster
This makes it easier to support tests with large memory footprints, as the default 63 pages may be insufficient
-rw-r--r--v/riscv_test.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/v/riscv_test.h b/v/riscv_test.h
index e39123c..f56c022 100644
--- a/v/riscv_test.h
+++ b/v/riscv_test.h
@@ -59,8 +59,12 @@ userstart: \
// Supervisor mode definitions and macros
//-----------------------------------------------------------------------
-#define MAX_TEST_PAGES 63 // this must be the period of the LFSR below
-#define LFSR_NEXT(x) (((((x)^((x)>>1)) & 1) << 5) | ((x) >> 1))
+#ifndef LFSR_BITS
+#define LFSR_BITS 6
+#endif
+
+#define MAX_TEST_PAGES ((1 << LFSR_BITS)-1) // this must be the period of the LFSR below
+#define LFSR_NEXT(x) (((((x)^((x)>>1)) & 1) << (LFSR_BITS-1)) | ((x) >> 1))
#define PGSHIFT 12
#define PGSIZE (1UL << PGSHIFT)