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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2015-07-17 12:30:49 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2015-07-17 12:30:49 -0700 |
| commit | cdf86f59e5706d1c35371b555892fe7b8ab2b01d (patch) | |
| tree | 376e0a6b94d3e9d4092d374ab2f9c86e02ff9a02 | |
| parent | 93cc8bffa3244a8ab4b507594d453faeb344d3d9 (diff) | |
| download | env-cdf86f59e5706d1c35371b555892fe7b8ab2b01d.zip env-cdf86f59e5706d1c35371b555892fe7b8ab2b01d.tar.gz env-cdf86f59e5706d1c35371b555892fe7b8ab2b01d.tar.bz2 | |
don't pass fpu/vector tests when fpu/vector not present
| -rw-r--r-- | p/riscv_test.h | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/p/riscv_test.h b/p/riscv_test.h index efd9c52..23d33b7 100644 --- a/p/riscv_test.h +++ b/p/riscv_test.h @@ -83,20 +83,11 @@ #define RVTEST_FP_ENABLE \ li a0, MSTATUS_FS & (MSTATUS_FS >> 1); \ csrs mstatus, a0; \ - csrr a0, mcpuid; \ - andi a0, a0, 1 << ('D' - 'A'); /* test for D extension */ \ - bnez a0, 1f; \ - RVTEST_PASS; /* "pass" the test if FPU not present */ \ -1:csrwi fcsr, 0 + csrwi fcsr, 0 #define RVTEST_VEC_ENABLE \ li a0, SSTATUS_XS & (SSTATUS_XS >> 1); \ csrs sstatus, a0; \ - csrr a1, sstatus; \ - and a0, a0, a1; \ - bnez a0, 2f; \ - RVTEST_PASS; \ -2: \ #define RISCV_MULTICORE_DISABLE \ csrr a0, mhartid; \ |