Update to privileged architecture version 1.7

9 files changed, 193 insertions, 320 deletions

diff --git a/encoding.h b/encoding.h
index 8891ab3..3854d82 100644
--- a/encoding.h
+++ b/encoding.h
@@ -3,42 +3,41 @@
 #ifndef RISCV_CSR_ENCODING_H
 #define RISCV_CSR_ENCODING_H
 
-#define MSTATUS_SSIP        0x00000002
-#define MSTATUS_HSIP        0x00000004
-#define MSTATUS_MSIP        0x00000008
-#define MSTATUS_IE          0x00000010
-#define MSTATUS_PRV         0x00000060
-#define MSTATUS_IE1         0x00000080
-#define MSTATUS_PRV1        0x00000300
-#define MSTATUS_IE2         0x00000400
-#define MSTATUS_PRV2        0x00001800
-#define MSTATUS_IE3         0x00002000
-#define MSTATUS_PRV3        0x0000C000
-#define MSTATUS_MPRV        0x00030000
-#define MSTATUS_VM          0x00780000
-#define MSTATUS_STIE        0x01000000
-#define MSTATUS_HTIE        0x02000000
-#define MSTATUS_MTIE        0x04000000
-#define MSTATUS_FS          0x18000000
-#define MSTATUS_XS          0x60000000
+#define MSTATUS_IE          0x00000001
+#define MSTATUS_PRV         0x00000006
+#define MSTATUS_IE1         0x00000008
+#define MSTATUS_PRV1        0x00000030
+#define MSTATUS_IE2         0x00000040
+#define MSTATUS_PRV2        0x00000180
+#define MSTATUS_IE3         0x00000200
+#define MSTATUS_PRV3        0x00000C00
+#define MSTATUS_FS          0x00003000
+#define MSTATUS_XS          0x0000C000
+#define MSTATUS_MPRV        0x00010000
+#define MSTATUS_VM          0x003E0000
 #define MSTATUS32_SD        0x80000000
-#define MSTATUS64_UA        0x0000000F00000000
-#define MSTATUS64_SA        0x000000F000000000
-#define MSTATUS64_HA        0x00000F0000000000
 #define MSTATUS64_SD        0x8000000000000000
 
-#define SSTATUS_SIP         0x00000002
-#define SSTATUS_IE          0x00000010
-#define SSTATUS_PIE         0x00000080
-#define SSTATUS_PS          0x00000100
-#define SSTATUS_UA          0x000F0000
+#define SSTATUS_IE          0x00000001
+#define SSTATUS_PIE         0x00000008
+#define SSTATUS_PS          0x00000010
+#define SSTATUS_FS          0x00003000
+#define SSTATUS_XS          0x0000C000
+#define SSTATUS_MPRV        0x00010000
 #define SSTATUS_TIE         0x01000000
-#define SSTATUS_TIP         0x04000000
-#define SSTATUS_FS          0x18000000
-#define SSTATUS_XS          0x60000000
 #define SSTATUS32_SD        0x80000000
 #define SSTATUS64_SD        0x8000000000000000
 
+#define MIP_SSIP            0x00000002
+#define MIP_HSIP            0x00000004
+#define MIP_MSIP            0x00000008
+#define MIP_STIP            0x00000200
+#define MIP_HTIP            0x00000400
+#define MIP_MTIP            0x00000800
+
+#define SIP_SSIP MIP_SSIP
+#define SIP_STIP MIP_STIP
+
 #define PRV_U 0
 #define PRV_S 1
 #define PRV_H 2
@@ -55,65 +54,64 @@
 #define UA_RV64  4
 #define UA_RV128 8
 
-#define IRQ_TIMER  0
-#define IRQ_IPI    1
+#define IRQ_SOFT   0
+#define IRQ_TIMER  1
 #define IRQ_HOST   2
 #define IRQ_COP    3
 
-#define IMPL_SPIKE  1
-#define IMPL_ROCKET 2
+#define IMPL_ROCKET 1
+
+#define DEFAULT_MTVEC 0x100
 
 // page table entry (PTE) fields
-#define PTE_TYPE   0x007
-#define PTE_PERM   0x018
-#define PTE_G      0x020 // Global
-#define PTE_R      0x040 // Referenced
-#define PTE_D      0x080 // Dirty
-#define PTE_SOFT   0x300 // Reserved for Software
-#define RV64_PTE_PPN_SHIFT 26
-#define RV32_PTE_PPN_SHIFT 10
-#define PTE_TYPE_INVALID 0
-#define PTE_TYPE_TABLE   1
-#define PTE_TYPE_U       2
-#define PTE_TYPE_S       3
-#define PTE_TYPE_US      4
-#define PTE_TYPE_US_SR   4
-#define PTE_TYPE_US_SRW  5
-#define PTE_TYPE_US_SRX  6
-#define PTE_TYPE_US_SRWX 7
+#define PTE_V     0x001 // Valid
+#define PTE_TYPE  0x01E // Type
+#define PTE_R     0x020 // Referenced
+#define PTE_D     0x040 // Dirty
+#define PTE_SOFT  0x380 // Reserved for Software
+
+#define PTE_TYPE_TABLE        0x00
+#define PTE_TYPE_TABLE_GLOBAL 0x02
+#define PTE_TYPE_URX_SR       0x04
+#define PTE_TYPE_URWX_SRW     0x06
+#define PTE_TYPE_UR_SR        0x08
+#define PTE_TYPE_URW_SRW      0x0A
+#define PTE_TYPE_URX_SRX      0x0C
+#define PTE_TYPE_URWX_SRWX    0x0E
+#define PTE_TYPE_SR           0x10
+#define PTE_TYPE_SRW          0x12
+#define PTE_TYPE_SRX          0x14
+#define PTE_TYPE_SRWX         0x16
+#define PTE_TYPE_SR_GLOBAL    0x18
+#define PTE_TYPE_SRW_GLOBAL   0x1A
+#define PTE_TYPE_SRX_GLOBAL   0x1C
+#define PTE_TYPE_SRWX_GLOBAL  0x1E
+
+#define PTE_PPN_SHIFT 10
 
-#define PROT_TO_PERM(PROT) ((((PROT) & PROT_EXEC) ? 2 : 0) | (((PROT) & PROT_WRITE) ? 1 : 0))
-#define PTE_CREATE(PPN, PERM_U, PERM_S) \
-  (((PPN) << PTE_PPN_SHIFT) | (PROT_TO_PERM(PERM_U) << 3) | \
-   ((PERM_U) && (PERM_S) ? (PTE_TYPE_US | PROT_TO_PERM(PERM_S)) : \
-   (PERM_S) ? (PTE_TYPE_S | (PROT_TO_PERM(PERM_S) << 3)) : \
-   (PERM_U) ? PTE_TYPE_U : 0))
+#define PTE_TABLE(PTE) ((0x0000000AU >> ((PTE) & 0x1F)) & 1)
+#define PTE_UR(PTE)    ((0x0000AAA0U >> ((PTE) & 0x1F)) & 1)
+#define PTE_UW(PTE)    ((0x00008880U >> ((PTE) & 0x1F)) & 1)
+#define PTE_UX(PTE)    ((0x0000A0A0U >> ((PTE) & 0x1F)) & 1)
+#define PTE_SR(PTE)    ((0xAAAAAAA0U >> ((PTE) & 0x1F)) & 1)
+#define PTE_SW(PTE)    ((0x88888880U >> ((PTE) & 0x1F)) & 1)
+#define PTE_SX(PTE)    ((0xA0A0A000U >> ((PTE) & 0x1F)) & 1)
 
-#define PTE_UR(PTE) ((0xF4F4F4F4U >> ((PTE) & 0x1f)) & 1)
-#define PTE_UW(PTE) ((0xF400F400U >> ((PTE) & 0x1f)) & 1)
-#define PTE_UX(PTE) ((0xF4F40000U >> ((PTE) & 0x1f)) & 1)
-#define PTE_SR(PTE) ((0xF8F8F8F8U >> ((PTE) & 0x1f)) & 1)
-#define PTE_SW(PTE) ((0xA8A0A8A0U >> ((PTE) & 0x1f)) & 1)
-#define PTE_SX(PTE) ((0xC8C8C0C0U >> ((PTE) & 0x1f)) & 1)
-#define PTE_CHECK_PERM(PTE, SUPERVISOR, WRITE, EXEC) \
-  ((SUPERVISOR) ? ((WRITE) ? PTE_SW(PTE) : (EXEC) ? PTE_SX(PTE) : PTE_SR(PTE)) \
-                : ((WRITE) ? PTE_UW(PTE) : (EXEC) ? PTE_UX(PTE) : PTE_UR(PTE)))
+#define PTE_CHECK_PERM(PTE, SUPERVISOR, STORE, FETCH) \
+  ((STORE) ? ((SUPERVISOR) ? PTE_SW(PTE) : PTE_UW(PTE)) : \
+   (FETCH) ? ((SUPERVISOR) ? PTE_SX(PTE) : PTE_UX(PTE)) : \
+             ((SUPERVISOR) ? PTE_SR(PTE) : PTE_UR(PTE)))
 
 #ifdef __riscv
 
 #ifdef __riscv64
-# define MSTATUS_UA MSTATUS64_UA
-# define MSTATUS_SA MSTATUS64_SA
-# define MSTATUS_HA MSTATUS64_HA
 # define MSTATUS_SD MSTATUS64_SD
 # define SSTATUS_SD SSTATUS64_SD
 # define RISCV_PGLEVEL_BITS 9
-# define PTE_PPN_SHIFT RV64_PTE_PPN_SHIFT
 #else
 # define MSTATUS_SD MSTATUS32_SD
 # define SSTATUS_SD SSTATUS32_SD
 # define RISCV_PGLEVEL_BITS 10
-# define PTE_PPN_SHIFT RV32_PTE_PPN_SHIFT
 #endif
 #define RISCV_PGSHIFT 12
 #define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
@@ -413,6 +411,8 @@
 #define MASK_FSUB_S  0xfe00007f
 #define MATCH_FSW 0x2027
 #define MASK_FSW  0x707f
+#define MATCH_HRTS 0x20500073
+#define MASK_HRTS  0xffffffff
 #define MATCH_JAL 0x6f
 #define MASK_JAL  0x7f
 #define MATCH_JALR 0x67
@@ -437,6 +437,8 @@
 #define MASK_LW  0x707f
 #define MATCH_LWU 0x6003
 #define MASK_LWU  0x707f
+#define MATCH_MRTH 0x30600073
+#define MASK_MRTH  0xffffffff
 #define MATCH_MRTS 0x30500073
 #define MASK_MRTS  0xffffffff
 #define MATCH_MUL 0x2000033
@@ -517,6 +519,8 @@
 #define MASK_SUBW  0xfe00707f
 #define MATCH_SW 0x2023
 #define MASK_SW  0x707f
+#define MATCH_WFI 0x10200073
+#define MASK_WFI  0xffffffff
 #define MATCH_XOR 0x4033
 #define MASK_XOR  0xfe00707f
 #define MATCH_XORI 0x4013
@@ -546,41 +550,59 @@
 #define CSR_UARCH15 0xccf
 #define CSR_SSTATUS 0x100
 #define CSR_STVEC 0x101
+#define CSR_SIE 0x104
 #define CSR_STIMECMP 0x121
 #define CSR_SSCRATCH 0x140
 #define CSR_SEPC 0x141
-#define CSR_SPTBR 0x188
-#define CSR_SASID 0x189
-#define CSR_SCYCLE 0x900
-#define CSR_STIME 0x901
-#define CSR_SINSTRET 0x902
-#define CSR_SCAUSE 0xd40
-#define CSR_SBADADDR 0xd41
+#define CSR_SIP 0x144
+#define CSR_SPTBR 0x180
+#define CSR_SASID 0x181
+#define CSR_CYCLEW 0x900
+#define CSR_TIMEW 0x901
+#define CSR_INSTRETW 0x902
+#define CSR_STIME 0xd01
+#define CSR_SCAUSE 0xd42
+#define CSR_SBADADDR 0xd43
+#define CSR_STIMEW 0xa01
 #define CSR_MSTATUS 0x300
+#define CSR_MTVEC 0x301
+#define CSR_MTDELEG 0x302
+#define CSR_MIE 0x304
+#define CSR_MTIMECMP 0x321
 #define CSR_MSCRATCH 0x340
 #define CSR_MEPC 0x341
 #define CSR_MCAUSE 0x342
 #define CSR_MBADADDR 0x343
-#define CSR_RESET 0x780
-#define CSR_TOHOST 0x781
-#define CSR_FROMHOST 0x782
+#define CSR_MIP 0x344
+#define CSR_MTIME 0x701
+#define CSR_MCPUID 0xf00
+#define CSR_MIMPID 0xf01
+#define CSR_MHARTID 0xf10
+#define CSR_MTOHOST 0x780
+#define CSR_MFROMHOST 0x781
+#define CSR_MRESET 0x782
 #define CSR_SEND_IPI 0x783
-#define CSR_HARTID 0xfc0
 #define CSR_CYCLEH 0xc80
 #define CSR_TIMEH 0xc81
 #define CSR_INSTRETH 0xc82
-#define CSR_SCYCLEH 0x980
-#define CSR_STIMEH 0x981
-#define CSR_SINSTRETH 0x982
+#define CSR_CYCLEHW 0x980
+#define CSR_TIMEHW 0x981
+#define CSR_INSTRETHW 0x982
+#define CSR_STIMEH 0xd81
+#define CSR_STIMEHW 0xa81
+#define CSR_MTIMEH 0x741
 #define CAUSE_MISALIGNED_FETCH 0x0
 #define CAUSE_FAULT_FETCH 0x1
 #define CAUSE_ILLEGAL_INSTRUCTION 0x2
+#define CAUSE_BREAKPOINT 0x3
 #define CAUSE_MISALIGNED_LOAD 0x4
 #define CAUSE_FAULT_LOAD 0x5
 #define CAUSE_MISALIGNED_STORE 0x6
 #define CAUSE_FAULT_STORE 0x7
-#define CAUSE_ECALL 0x8
-#define CAUSE_BREAKPOINT 0x9
+#define CAUSE_USER_ECALL 0x8
+#define CAUSE_SUPERVISOR_ECALL 0x9
+#define CAUSE_HYPERVISOR_ECALL 0xa
+#define CAUSE_MACHINE_ECALL 0xb
 #endif
 #ifdef DECLARE_INSN
 DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
@@ -709,6 +731,7 @@ DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
 DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
 DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
 DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
+DECLARE_INSN(hrts, MATCH_HRTS, MASK_HRTS)
 DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
 DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
 DECLARE_INSN(lb, MATCH_LB, MASK_LB)
@@ -721,6 +744,7 @@ DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
 DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
 DECLARE_INSN(lw, MATCH_LW, MASK_LW)
 DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
+DECLARE_INSN(mrth, MATCH_MRTH, MASK_MRTH)
 DECLARE_INSN(mrts, MATCH_MRTS, MASK_MRTS)
 DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
 DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
@@ -761,6 +785,7 @@ DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
 DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
 DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
 DECLARE_INSN(sw, MATCH_SW, MASK_SW)
+DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
 DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
 DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
 #endif
@@ -790,32 +815,47 @@ DECLARE_CSR(uarch14, CSR_UARCH14)
 DECLARE_CSR(uarch15, CSR_UARCH15)
 DECLARE_CSR(sstatus, CSR_SSTATUS)
 DECLARE_CSR(stvec, CSR_STVEC)
+DECLARE_CSR(sie, CSR_SIE)
 DECLARE_CSR(stimecmp, CSR_STIMECMP)
 DECLARE_CSR(sscratch, CSR_SSCRATCH)
 DECLARE_CSR(sepc, CSR_SEPC)
+DECLARE_CSR(sip, CSR_SIP)
 DECLARE_CSR(sptbr, CSR_SPTBR)
 DECLARE_CSR(sasid, CSR_SASID)
-DECLARE_CSR(scycle, CSR_SCYCLE)
+DECLARE_CSR(cyclew, CSR_CYCLEW)
+DECLARE_CSR(timew, CSR_TIMEW)
+DECLARE_CSR(instretw, CSR_INSTRETW)
 DECLARE_CSR(stime, CSR_STIME)
-DECLARE_CSR(sinstret, CSR_SINSTRET)
 DECLARE_CSR(scause, CSR_SCAUSE)
 DECLARE_CSR(sbadaddr, CSR_SBADADDR)
+DECLARE_CSR(stimew, CSR_STIMEW)
 DECLARE_CSR(mstatus, CSR_MSTATUS)
+DECLARE_CSR(mtvec, CSR_MTVEC)
+DECLARE_CSR(mtdeleg, CSR_MTDELEG)
+DECLARE_CSR(mie, CSR_MIE)
+DECLARE_CSR(mtimecmp, CSR_MTIMECMP)
 DECLARE_CSR(mscratch, CSR_MSCRATCH)
 DECLARE_CSR(mepc, CSR_MEPC)
 DECLARE_CSR(mcause, CSR_MCAUSE)
 DECLARE_CSR(mbadaddr, CSR_MBADADDR)
-DECLARE_CSR(reset, CSR_RESET)
-DECLARE_CSR(tohost, CSR_TOHOST)
-DECLARE_CSR(fromhost, CSR_FROMHOST)
+DECLARE_CSR(mip, CSR_MIP)
+DECLARE_CSR(mtime, CSR_MTIME)
+DECLARE_CSR(mcpuid, CSR_MCPUID)
+DECLARE_CSR(mimpid, CSR_MIMPID)
+DECLARE_CSR(mhartid, CSR_MHARTID)
+DECLARE_CSR(mtohost, CSR_MTOHOST)
+DECLARE_CSR(mfromhost, CSR_MFROMHOST)
+DECLARE_CSR(mreset, CSR_MRESET)
 DECLARE_CSR(send_ipi, CSR_SEND_IPI)
-DECLARE_CSR(hartid, CSR_HARTID)
 DECLARE_CSR(cycleh, CSR_CYCLEH)
 DECLARE_CSR(timeh, CSR_TIMEH)
 DECLARE_CSR(instreth, CSR_INSTRETH)
-DECLARE_CSR(scycleh, CSR_SCYCLEH)
+DECLARE_CSR(cyclehw, CSR_CYCLEHW)
+DECLARE_CSR(timehw, CSR_TIMEHW)
+DECLARE_CSR(instrethw, CSR_INSTRETHW)
 DECLARE_CSR(stimeh, CSR_STIMEH)
-DECLARE_CSR(sinstreth, CSR_SINSTRETH)
+DECLARE_CSR(stimehw, CSR_STIMEHW)
+DECLARE_CSR(mtimeh, CSR_MTIMEH)
 #endif
 #ifdef DECLARE_CAUSE
 DECLARE_CAUSE("fflags", CAUSE_FFLAGS)
@@ -843,30 +883,45 @@ DECLARE_CAUSE("uarch14", CAUSE_UARCH14)
 DECLARE_CAUSE("uarch15", CAUSE_UARCH15)
 DECLARE_CAUSE("sstatus", CAUSE_SSTATUS)
 DECLARE_CAUSE("stvec", CAUSE_STVEC)
+DECLARE_CAUSE("sie", CAUSE_SIE)
 DECLARE_CAUSE("stimecmp", CAUSE_STIMECMP)
 DECLARE_CAUSE("sscratch", CAUSE_SSCRATCH)
 DECLARE_CAUSE("sepc", CAUSE_SEPC)
+DECLARE_CAUSE("sip", CAUSE_SIP)
 DECLARE_CAUSE("sptbr", CAUSE_SPTBR)
 DECLARE_CAUSE("sasid", CAUSE_SASID)
-DECLARE_CAUSE("scycle", CAUSE_SCYCLE)
+DECLARE_CAUSE("cyclew", CAUSE_CYCLEW)
+DECLARE_CAUSE("timew", CAUSE_TIMEW)
+DECLARE_CAUSE("instretw", CAUSE_INSTRETW)
 DECLARE_CAUSE("stime", CAUSE_STIME)
-DECLARE_CAUSE("sinstret", CAUSE_SINSTRET)
 DECLARE_CAUSE("scause", CAUSE_SCAUSE)
 DECLARE_CAUSE("sbadaddr", CAUSE_SBADADDR)
+DECLARE_CAUSE("stimew", CAUSE_STIMEW)
 DECLARE_CAUSE("mstatus", CAUSE_MSTATUS)
+DECLARE_CAUSE("mtvec", CAUSE_MTVEC)
+DECLARE_CAUSE("mtdeleg", CAUSE_MTDELEG)
+DECLARE_CAUSE("mie", CAUSE_MIE)
+DECLARE_CAUSE("mtimecmp", CAUSE_MTIMECMP)
 DECLARE_CAUSE("mscratch", CAUSE_MSCRATCH)
 DECLARE_CAUSE("mepc", CAUSE_MEPC)
 DECLARE_CAUSE("mcause", CAUSE_MCAUSE)
 DECLARE_CAUSE("mbadaddr", CAUSE_MBADADDR)
-DECLARE_CAUSE("reset", CAUSE_RESET)
-DECLARE_CAUSE("tohost", CAUSE_TOHOST)
-DECLARE_CAUSE("fromhost", CAUSE_FROMHOST)
+DECLARE_CAUSE("mip", CAUSE_MIP)
+DECLARE_CAUSE("mtime", CAUSE_MTIME)
+DECLARE_CAUSE("mcpuid", CAUSE_MCPUID)
+DECLARE_CAUSE("mimpid", CAUSE_MIMPID)
+DECLARE_CAUSE("mhartid", CAUSE_MHARTID)
+DECLARE_CAUSE("mtohost", CAUSE_MTOHOST)
+DECLARE_CAUSE("mfromhost", CAUSE_MFROMHOST)
+DECLARE_CAUSE("mreset", CAUSE_MRESET)
 DECLARE_CAUSE("send_ipi", CAUSE_SEND_IPI)
-DECLARE_CAUSE("hartid", CAUSE_HARTID)
 DECLARE_CAUSE("cycleh", CAUSE_CYCLEH)
 DECLARE_CAUSE("timeh", CAUSE_TIMEH)
 DECLARE_CAUSE("instreth", CAUSE_INSTRETH)
-DECLARE_CAUSE("scycleh", CAUSE_SCYCLEH)
+DECLARE_CAUSE("cyclehw", CAUSE_CYCLEHW)
+DECLARE_CAUSE("timehw", CAUSE_TIMEHW)
+DECLARE_CAUSE("instrethw", CAUSE_INSTRETHW)
 DECLARE_CAUSE("stimeh", CAUSE_STIMEH)
-DECLARE_CAUSE("sinstreth", CAUSE_SINSTRETH)
+DECLARE_CAUSE("stimehw", CAUSE_STIMEHW)
+DECLARE_CAUSE("mtimeh", CAUSE_MTIMEH)
 #endif
diff --git a/p/link.ld b/p/link.ld
index 694e906..0b2382e 100644
--- a/p/link.ld
+++ b/p/link.ld
@@ -1,44 +1,12 @@
-/*======================================================================*/
-/* Proxy kernel linker script                                           */
-/*======================================================================*/
-/* This is the linker script used when building the proxy kernel. */
-
-/*----------------------------------------------------------------------*/
-/* Setup                                                                */
-/*----------------------------------------------------------------------*/
-
-/* The OUTPUT_ARCH command specifies the machine architecture where the
-   argument is one of the names used in the BFD library. More
-   specifically one of the entires in bfd/cpu-mips.c */
-
 OUTPUT_ARCH( "riscv" )
 
-/* The ENTRY command specifies the entry point (ie. first instruction
-   to execute). The symbol _start should be defined in each test. */
-
-ENTRY( _start )
-
-/*----------------------------------------------------------------------*/
-/* Sections                                                             */
-/*----------------------------------------------------------------------*/
-
 SECTIONS
 {
-
-  /* text: test code section */
-  . = 0;
-  .text :
-  {
-    *(.text)
-  }
-
-  /* data: Initialized data segment */
-  .data :
-  {
-    *(.data)
-  }
-
-  /* End of uninitalized data segement */
+  . = 0x100;
+  .text.init : { *(.text.init) }
+  .text : { *(.text) }
+  .data ALIGN(0x1000) : { *(.data) }
+  .bss : { *(.bss) }
   _end = .;
 }
 
diff --git a/p/riscv_test.h b/p/riscv_test.h
index a94c81c..a3cb7c2 100644
--- a/p/riscv_test.h
+++ b/p/riscv_test.h
@@ -27,18 +27,15 @@
 
 #define RVTEST_RV32U                                                    \
   .macro init;                                                          \
-  RVTEST_32_ENABLE;                                                     \
   .endm
 
 #define RVTEST_RV32UF                                                   \
   .macro init;                                                          \
-  RVTEST_32_ENABLE;                                                     \
   RVTEST_FP_ENABLE;                                                     \
   .endm
 
 #define RVTEST_RV32UV                                                   \
   .macro init;                                                          \
-  RVTEST_32_ENABLE;                                                     \
   RVTEST_FP_ENABLE;                                                     \
   RVTEST_VEC_ENABLE;                                                    \
   .endm
@@ -62,32 +59,19 @@
 #define RVTEST_RV32M                                                    \
   .macro init;                                                          \
   RVTEST_ENABLE_MACHINE;                                                \
-  RVTEST_32_ENABLE;                                                     \
   .endm
 
 #define RVTEST_RV32S                                                    \
   .macro init;                                                          \
   RVTEST_ENABLE_SUPERVISOR;                                             \
-  RVTEST_32_ENABLE;                                                     \
   .endm
 
-#define RVTEST_32_ENABLE                                                \
-  li a0, (MSTATUS64_UA | MSTATUS64_SA) >> 31;                           \
-  slli a0, a0, 31;                                                      \
-  csrc mstatus, a0
-
 #ifdef __riscv64
-# define RVTEST_64_ENABLE                                               \
-  RVTEST_32_ENABLE;                                                     \
-  li a0, UA_RV64 * (MSTATUS64_UA & ~(MSTATUS64_UA<<1));                 \
-  csrs mstatus, a0;                                                     \
-  li a0, UA_RV64 * (MSTATUS64_SA & ~(MSTATUS64_SA<<1));                 \
-  csrs mstatus, a0
+# define CHECK_XLEN csrr a0, mcpuid; bltz a0, 1f; RVTEST_PASS; 1:
 #else
-# define RVTEST_64_ENABLE
+# define CHECK_XLEN csrr a0, mcpuid; bgez a0, 1f; RVTEST_PASS; 1:
 #endif
 
-
 #define RVTEST_ENABLE_SUPERVISOR                                        \
   li a0, MSTATUS_PRV1 & (MSTATUS_PRV1 >> 1);                            \
   csrs mstatus, a0;                                                     \
@@ -97,10 +81,13 @@
   csrs mstatus, a0;                                                     \
 
 #define RVTEST_FP_ENABLE                                                \
-  li a0, SSTATUS_FS & (SSTATUS_FS >> 1);                                \
-  csrs sstatus, a0;                                                     \
-test_fpu_presence:                                                      \
-  fssr x0;                                                              \
+  li a0, MSTATUS_FS & (MSTATUS_FS >> 1);                                \
+  csrs mstatus, a0;                                                     \
+  csrr a0, mcpuid;                                                      \
+  andi a0, a0, 1 << ('D' - 'A'); /* test for D extension */             \
+  bnez a0, 1f;                                                          \
+  RVTEST_PASS; /* "pass" the test if FPU not present */                 \
+1:
 
 #define RVTEST_VEC_ENABLE                                               \
   li a0, SSTATUS_XS & (SSTATUS_XS >> 1);                                \
@@ -112,7 +99,7 @@ test_fpu_presence:                                                      \
 2:                                                                      \
 
 #define RISCV_MULTICORE_DISABLE                                         \
-  csrr a0, hartid;                                                      \
+  csrr a0, mhartid;                                                     \
   1: bnez a0, 1b
 
 #define EXTRA_TVEC_USER
@@ -127,7 +114,6 @@ test_fpu_presence:                                                      \
         .align  6;                                                      \
         .weak stvec_handler;                                            \
         .weak mtvec_handler;                                            \
-        .weak test_fpu_presence;                                        \
 tvec_user:                                                              \
         EXTRA_TVEC_USER;                                                \
         /* test whether the test came from pass/fail */                 \
@@ -163,14 +149,9 @@ tvec_hypervisor:                                                        \
         EXTRA_TVEC_HYPERVISOR;                                          \
         /* renting some space out here */                               \
   other_exception:                                                      \
-        csrr t6, mepc;                                                  \
-        la t5, test_fpu_presence;                                       \
-        beqz t5, 1f;                                                    \
-        bne t5, t6, 1f;                                                 \
-        RVTEST_PASS;                                                    \
   1:    ori TESTNUM, TESTNUM, 1337; /* some other exception occurred */ \
   write_tohost:                                                         \
-        csrw tohost, TESTNUM;                                           \
+        csrw mtohost, TESTNUM;                                          \
         j write_tohost;                                                 \
         .align  6;                                                      \
 tvec_machine:                                                           \
@@ -185,7 +166,7 @@ tvec_machine:                                                           \
         .globl _start;                                                  \
 _start:                                                                 \
         RISCV_MULTICORE_DISABLE;                                        \
-        RVTEST_64_ENABLE;                                               \
+        CHECK_XLEN;                                                     \
         la t0, stvec_handler;                                           \
         beqz t0, skip_set_stvec;                                        \
         csrw stvec, t0;                                                 \
@@ -197,7 +178,7 @@ _start:                                                                 \
         EXTRA_INIT_TIMER;                                               \
         la t0, 1f;                                                      \
         csrw mepc, t0;                                                  \
-        csrr a0, hartid;                                                \
+        csrr a0, mhartid;                                               \
         eret;                                                           \
 1:
 
diff --git a/pm/link.ld b/pm/link.ld
index 694e906..86b45f9 100644..120000
--- a/pm/link.ld
+++ b/pm/link.ld
@@ -1,44 +1 @@
-/*======================================================================*/
-/* Proxy kernel linker script                                           */
-/*======================================================================*/
-/* This is the linker script used when building the proxy kernel. */
-
-/*----------------------------------------------------------------------*/
-/* Setup                                                                */
-/*----------------------------------------------------------------------*/
-
-/* The OUTPUT_ARCH command specifies the machine architecture where the
-   argument is one of the names used in the BFD library. More
-   specifically one of the entires in bfd/cpu-mips.c */
-
-OUTPUT_ARCH( "riscv" )
-
-/* The ENTRY command specifies the entry point (ie. first instruction
-   to execute). The symbol _start should be defined in each test. */
-
-ENTRY( _start )
-
-/*----------------------------------------------------------------------*/
-/* Sections                                                             */
-/*----------------------------------------------------------------------*/
-
-SECTIONS
-{
-
-  /* text: test code section */
-  . = 0;
-  .text :
-  {
-    *(.text)
-  }
-
-  /* data: Initialized data segment */
-  .data :
-  {
-    *(.data)
-  }
-
-  /* End of uninitalized data segement */
-  _end = .;
-}
-
+../p/link.ld
\ No newline at end of file
diff --git a/pt/link.ld b/pt/link.ld
index 694e906..86b45f9 100644..120000
--- a/pt/link.ld
+++ b/pt/link.ld
@@ -1,44 +1 @@
-/*======================================================================*/
-/* Proxy kernel linker script                                           */
-/*======================================================================*/
-/* This is the linker script used when building the proxy kernel. */
-
-/*----------------------------------------------------------------------*/
-/* Setup                                                                */
-/*----------------------------------------------------------------------*/
-
-/* The OUTPUT_ARCH command specifies the machine architecture where the
-   argument is one of the names used in the BFD library. More
-   specifically one of the entires in bfd/cpu-mips.c */
-
-OUTPUT_ARCH( "riscv" )
-
-/* The ENTRY command specifies the entry point (ie. first instruction
-   to execute). The symbol _start should be defined in each test. */
-
-ENTRY( _start )
-
-/*----------------------------------------------------------------------*/
-/* Sections                                                             */
-/*----------------------------------------------------------------------*/
-
-SECTIONS
-{
-
-  /* text: test code section */
-  . = 0;
-  .text :
-  {
-    *(.text)
-  }
-
-  /* data: Initialized data segment */
-  .data :
-  {
-    *(.data)
-  }
-
-  /* End of uninitalized data segement */
-  _end = .;
-}
-
+../p/link.ld
\ No newline at end of file
diff --git a/pt/riscv_test.h b/pt/riscv_test.h
index 84b2d51..93c1c4d 100644
--- a/pt/riscv_test.h
+++ b/pt/riscv_test.h
@@ -22,9 +22,9 @@ _skip:                                                                  \
 _jump_around_interrupt_handler:                                         \
 
 #define ENABLE_TIMER_INTERRUPT                                          \
-        li a0, MSTATUS_STIE;                                            \
-        csrs mstatus, a0;                                               \
-        csrr a0, scycle;                                                \
+        li a0, MIP_STIP;                                                \
+        csrs mie, a0;                                                   \
+        csrr a0, stime;                                                 \
         addi a0, a0, TIMER_INTERVAL;                                    \
         csrw stimecmp, a0;                                              \
 
@@ -42,7 +42,7 @@ _interrupt_handler:                                                     \
         VECTOR_RESTORE;                                                 \
 _skip_vector_restore:                                                   \
         csrr a1, sscratch;                                              \
-        csrr a0, scycle;                                                \
+        csrr a0, stime;                                                 \
         addi a0, a0, TIMER_INTERVAL;                                    \
         csrw stimecmp, a0;                                              \
         csrr a0, mscratch;                                              \
diff --git a/v/entry.S b/v/entry.S
index d0dcfc3..0f0ee14 100644
--- a/v/entry.S
+++ b/v/entry.S
@@ -12,7 +12,7 @@
 
 #define STACK_TOP (_end + 131072)
 
-  .text
+  .section ".text.init"
   .align 6
 entry_from_user:
   j trap_entry
diff --git a/v/link.ld b/v/link.ld
index 3ae9717..86b45f9 100644..120000
--- a/v/link.ld
+++ b/v/link.ld
@@ -1,45 +1 @@
-/*======================================================================*/
-/* Proxy kernel linker script                                           */
-/*======================================================================*/
-/* This is the linker script used when building the proxy kernel. */
-
-/*----------------------------------------------------------------------*/
-/* Setup                                                                */
-/*----------------------------------------------------------------------*/
-
-/* The OUTPUT_ARCH command specifies the machine architecture where the
-   argument is one of the names used in the BFD library. More
-   specifically one of the entires in bfd/cpu-mips.c */
-
-OUTPUT_ARCH( "riscv" )
-
-/*----------------------------------------------------------------------*/
-/* Sections                                                             */
-/*----------------------------------------------------------------------*/
-
-SECTIONS
-{
-
-  /* text: test code section */
-  . = 0;
-  .text :
-  {
-    *(.text)
-  }
-
-  /* data: Initialized data segment */
-  .data ALIGN(0x2000):
-  {
-    *(.data)
-  }
-
-  /* bss: Initialized bss segment */
-  .bss ALIGN(0x2000):
-  {
-    *(.bss)
-  }
-
-  /* End of uninitalized bss segement */
-  _end = .;
-}
-
+../p/link.ld
\ No newline at end of file
diff --git a/v/vm.c b/v/vm.c
index eae3f8a..5d0baa7 100644
--- a/v/vm.c
+++ b/v/vm.c
@@ -11,8 +11,8 @@ void pop_tf(trapframe_t*);
 
 static void cputchar(int x)
 {
-  while (swap_csr(tohost, 0x0101000000000000 | (unsigned char)x));
-  while (swap_csr(fromhost, 0) == 0);
+  while (swap_csr(mtohost, 0x0101000000000000 | (unsigned char)x));
+  while (swap_csr(mfromhost, 0) == 0);
 }
 
 static void cputstring(const char* s)
@@ -23,7 +23,7 @@ static void cputstring(const char* s)
 
 static void terminate(int code)
 {
-  while (swap_csr(tohost, code));
+  while (swap_csr(mtohost, code));
   while (1);
 }
 
@@ -95,7 +95,7 @@ void handle_fault(unsigned long addr)
   if (freelist_head == freelist_tail)
     freelist_tail = 0;
 
-  l3pt[addr/PGSIZE] = (node->addr >> PGSHIFT << PTE_PPN_SHIFT) | PTE_TYPE | PTE_PERM;
+  l3pt[addr/PGSIZE] = (node->addr >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_URWX_SRW;
   asm volatile ("sfence.vm");
 
   assert(user_mapping[addr/PGSIZE].addr == 0);
@@ -160,7 +160,7 @@ static void restore_vector(trapframe_t* tf)
 
 void handle_trap(trapframe_t* tf)
 {
-  if (tf->cause == CAUSE_ECALL)
+  if (tf->cause == CAUSE_USER_ECALL)
   {
     int n = tf->gpr[10];
 
@@ -209,17 +209,16 @@ out:
 
 void vm_boot(long test_addr, long seed)
 {
-  while (read_csr(hartid) > 0); // only core 0 proceeds
+  while (read_csr(mhartid) > 0); // only core 0 proceeds
 
   assert(SIZEOF_TRAPFRAME_T == sizeof(trapframe_t));
 
-  l1pt[0] = ((pte_t)l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_TYPE_TABLE;
-  l2pt[0] = ((pte_t)l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_TYPE_TABLE;
+  l1pt[0] = ((pte_t)l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_TABLE;
+  l2pt[0] = ((pte_t)l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_TABLE;
   write_csr(sptbr, l1pt);
-  set_csr(mstatus, MSTATUS_IE1 | MSTATUS_FS | MSTATUS_XS | MSTATUS_MPRV);
-  clear_csr(mstatus, MSTATUS_VM | MSTATUS_UA | MSTATUS_PRV1);
+  set_csr(mstatus, MSTATUS_IE1 | MSTATUS_FS | MSTATUS_XS);
+  clear_csr(mstatus, MSTATUS_VM | MSTATUS_PRV1);
   set_csr(mstatus, (long)VM_SV39 << __builtin_ctzl(MSTATUS_VM));
-  set_csr(mstatus, (long)UA_RV64 << __builtin_ctzl(MSTATUS_UA));
 
   seed = 1 + (seed % MAX_TEST_PAGES);
   freelist_head = &freelist_nodes[0];