1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
# See LICENSE for license details.
#*****************************************************************************
# scall.S
#-----------------------------------------------------------------------------
#
# Test syscall trap.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64S
RVTEST_CODE_BEGIN
#ifdef __MACHINE_MODE
#define sscratch mscratch
#define sstatus mstatus
#define scause mcause
#define stvec mtvec
#define sepc mepc
#define sret mret
#define stvec_handler mtvec_handler
#endif
li TESTNUM, 2
do_break:
sbreak
j fail
TEST_PASSFAIL
.align 2
.global stvec_handler
stvec_handler:
li t1, CAUSE_BREAKPOINT
csrr t0, scause
# Check if CLIC mode
csrr t2, stvec
andi t2, t2, 2
# Skip masking if non-CLIC mode
beqz t2, skip_mask
andi t0, t0, 255
skip_mask:
bne t0, t1, fail
la t1, do_break
csrr t0, sepc
bne t0, t1, fail
j pass
RVTEST_CODE_END
.data
RVTEST_DATA_BEGIN
TEST_DATA
RVTEST_DATA_END
|
