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rocket-tools/riscv-tests.git
attempt-travis-fix
ceasetest2
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cs152-sp18-lab3
debug
debug-0.13
debug-clear-satp
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debug_disassemble
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Author
Files
Lines
2014-08-28
Added "simple" test to rv32ui.
Christopher Celio
2
-0
/
+26
2014-05-07
Add timer interrupt test
Andrew Waterman
3
-4
/
+66
2014-04-18
Added a new test case to REMW.
Christopher Celio
1
-0
/
+1
2014-04-08
Adjust hwacha misaligned instruction test to ignore lower 2 bits in compariso...
Stephen Twigg
1
-0
/
+2
2014-03-18
Check FP corner cases and flags
Andrew Waterman
7
-183
/
+210
2014-03-06
Add fclass.{s|d} test
Andrew Waterman
2
-1
/
+58
2014-03-02
add vfmsv.{s,d} tests
Yunsup Lee
3
-5
/
+60
2014-02-27
add keepcfg test
Yunsup Lee
2
-1
/
+84
2014-02-26
test to see whether vector unit is able to take 2 fmas in parallel
Yunsup Lee
2
-1
/
+181
2014-02-10
Revert to old AUIPC definition
Andrew Waterman
3
-21
/
+13
2014-02-03
Add vfmsv instruction test, change vsetprec to vsetucfg
Quan Nguyen
3
-2
/
+58
2014-01-31
Shrink hex dumps
Andrew Waterman
27
-28
/
+2
2014-01-31
Add rv32si tests, including illegality of shamt[5]
Andrew Waterman
7
-10
/
+90
2014-01-31
Make CSR test much more robust
Andrew Waterman
1
-0
/
+52
2014-01-31
Reference TESTNUM instead of x28 directly
Andrew Waterman
68
-212
/
+212
2014-01-23
Done with rv32ui asm test ports
Eric Love
1
-2
/
+2
2014-01-23
Fixed srl, srli
Eric Love
3
-25
/
+35
2014-01-23
srl and srai
Eric Love
3
-33
/
+33
2014-01-23
First round of rv32ui asm tests
Eric Love
50
-15
/
+3410
2014-01-21
Add CSRRx/CSRRxI test
Andrew Waterman
3
-1
/
+35
2014-01-20
Add packed vvadd test for confprec Hwacha
Quan Nguyen
2
-0
/
+106
2014-01-16
Make LR/SC test more thorough
Andrew Waterman
1
-19
/
+32
2013-11-28
Fix load offsets for the vvadd_fw test
Albert Ou
1
-3
/
+3
2013-11-24
Update to new privileged ISA
Andrew Waterman
16
-84
/
+90
2013-11-19
Add rv64uv-p-amoxor_{w,d} tests
Quan Nguyen
3
-2
/
+118
2013-11-19
fix rv64uv/vvadd_fd test to correctly check results
Yunsup Lee
1
-2
/
+2
2013-11-05
correctly set SR_EA bit for all vector physical supervisor tests
Yunsup Lee
12
-0
/
+14
2013-11-05
correctly set SR_EA bit for all vector physical tests
Yunsup Lee
60
-59
/
+61
2013-10-18
revamp pt tests as well
Yunsup Lee
3
-3
/
+3
2013-10-18
hwacha virtual tests working
Yunsup Lee
3
-3
/
+3
2013-10-17
add hwacha exception support
Yunsup Lee
14
-108
/
+427
2013-10-17
disable vector bank tests
Yunsup Lee
3
-594
/
+594
2013-10-17
add passing physical vector tests back in
Yunsup Lee
4
-5
/
+4
2013-10-17
update out-of-date floating-point test in rv64uv
Yunsup Lee
1
-1
/
+1
2013-10-17
fix broken amoor_w rv64uv test
Yunsup Lee
1
-0
/
+3
2013-10-10
revamp hwacha tests
Yunsup Lee
67
-1719
/
+1778
2013-09-21
Re-enable virtual memory tests
Andrew Waterman
2
-3
/
+3
2013-09-21
New AUIPC semantics
Andrew Waterman
1
-6
/
+12
2013-09-11
Add AMOXOR test
Andrew Waterman
3
-2
/
+128
2013-08-24
don't emit vvcfg for now
Andrew Waterman
1
-1
/
+1
2013-08-23
Reflect changes to ISA
Andrew Waterman
13
-72
/
+72
2013-08-12
Merge branch 'master' of git://github.com/ucb-bar/riscv-tests into configure
Sebastien Mirolo
4
-174
/
+2
2013-07-25
Remove JALR static hints
Andrew Waterman
4
-174
/
+2
2013-07-24
feature: add autoconf
Sebastien Mirolo
1
-13
/
+17
2013-06-10
Don't disassemble zeros
Andrew Waterman
1
-1
/
+1
2013-05-16
add failing multiply test
Yunsup Lee
1
-0
/
+3
2013-05-13
change riscv-isa-run to spike
Yunsup Lee
1
-1
/
+1
2013-05-02
use RVTEST_RV64UF macro for FPU tests
Andrew Waterman
10
-10
/
+10
2013-04-29
add first RV32 tests
Andrew Waterman
12
-7
/
+634
2013-04-24
add gitignore
Yunsup Lee
1
-0
/
+1
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