| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2016-07-11 | Remove instruction width assumptions to support RVC | Andrew Waterman | 1 | -0/+1 |
| 2016-07-06 | Update to new PTE format | Andrew Waterman | 1 | -4/+4 |
| 2016-05-02 | Stop using tohost/fromhost registers | Andrew Waterman | 1 | -2/+8 |
| 2016-04-30 | ERET -> xRET; new memory map | Andrew Waterman | 1 | -7/+9 |
| 2016-03-10 | Add missing rv32mi/rv32si tests | Andrew Waterman | 1 | -2/+2 |
| 2016-03-03 | WIP on priv spec v1.9 | Andrew Waterman | 1 | -1/+3 |
| 2015-05-09 | Update to privileged architecture version 1.7 | Andrew Waterman | 1 | -2/+2 |
| 2015-04-03 | Run RV32 tests on spike with --isa=RV32 | Andrew Waterman | 1 | -1/+1 |
| 2015-03-27 | New virtual memory implementation (Sv39) | Andrew Waterman | 1 | -4/+4 |
| 2015-03-25 | split out S-mode tests and M-mode tests | Yunsup Lee | 1 | -0/+82 |
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index : rocket-tools/riscv-tests.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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