index
:
rocket-tools/riscv-tests.git
attempt-travis-fix
ceasetest2
compliance_tests
cs152-sp18-lab3
debug
debug-0.13
debug-clear-satp
debug-delete-sim
debug_auth
debug_disassemble
disable_unavailable
dma-memcpy
eos20-bringup
hw_watchpoint
interrupts
master
misc
no_progbuf
priv
privchange-dontdeleteme
python3
rekall
resume_from_trigger
riscv-tests-sail
rtos
rvt-master
smi-demo
split-isa-tests
sqrt-171
tmp
trap_entry_align
trap_entry_align-1
travis-dev
trigger_priority
usb_error
xlen_fix
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
isa
/
rv64mi
/
breakpoint.S
Age
Commit message (
Expand
)
Author
Files
Lines
2019-04-20
masking no longer required.
Neel
1
-16
/
+0
2019-04-20
removing check for reset value of type in mcontrol
Neel
1
-10
/
+8
2019-04-20
fix for #159 #158
Neel
1
-4
/
+7
2018-09-06
Revert "breakpoint.S: Don't assume trigger is hardwired to breakpoint (#158) ...
Andrew Waterman
1
-1
/
+1
2018-09-06
breakpoint.S: Don't assume trigger is hardwired to breakpoint (#158) (#159)
Tommy Thorn
1
-1
/
+1
2017-10-30
Declare trap handlers as global symbols. (#87)
Richard Xia
1
-0
/
+2
2016-12-06
avoid non-standard predefined macros
Andrew Waterman
1
-2
/
+2
2016-08-26
Update to new breakpoint & counter spec
Andrew Waterman
1
-26
/
+25
2016-07-29
Add an RVC test
Andrew Waterman
1
-1
/
+2
2016-06-17
Fix breakpoint test when only one breakpoint present
Andrew Waterman
1
-1
/
+8
2016-06-10
Test more than one breakpoint at a time, if present
Andrew Waterman
1
-44
/
+68
2016-06-09
Update breakpoint spec
Andrew Waterman
1
-4
/
+19
2016-06-08
Don't arm breakpoint before setting break address
Andrew Waterman
1
-12
/
+11
2016-06-08
Add HW breakpoint test
Andrew Waterman
1
-0
/
+97