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path: root/debug/targets/RISC-V/spike32-2.py
AgeCommit message (Expand)AuthorFilesLines
2019-12-18Hardcode misa values for all spike targets. (#227)Tim Newsome1-1/+2
2019-05-16Cover with/without halt groups. (#191)Tim Newsome1-1/+1
2019-04-08Test lack of abstract CSR access. (#187)Tim Newsome1-1/+2
2018-12-31Add testing of run-test/idle cases.Tim Newsome1-1/+1
2018-08-29Add test case for `riscv expose_custom`.Tim Newsome1-0/+1
2018-03-01Test debugging with/without a program bufferTim Newsome1-1/+1
2017-12-27Test FPRs that aren't XLEN in size.Tim Newsome1-1/+1
2017-09-29Fix tests to work in multi-gdb mode.Tim Newsome1-1/+1
2017-09-21Add coverage for single-core non-rtos OpenOCD.Tim Newsome1-1/+1
2017-08-28Increase remotetimeout for spike targets.Tim Newsome1-0/+1
2017-08-28Make pylint happy.Tim Newsome1-1/+1
2017-08-28Make the debug tests aware of multicore.Tim Newsome1-0/+11