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2020-11-20
Only attempt to build tests supported by compiler
Andrew Waterman
19
-38
/
+6
2020-11-11
add zfh (float16) test case and related macros (#301)
Chih-Min Chao
26
-0
/
+769
2020-10-19
use registers present on rv32e (#299)
Sandeep Rajendran
1
-4
/
+4
2020-10-15
bump env (#298)
Sandeep Rajendran
1
-14
/
+14
2020-10-08
Expose registers on all harts in openocd cfgs (#297)
Samuel Obuch
2
-4
/
+10
2020-10-02
Modify PMP benchmark to detect granularity (#295)
Moritz Schneider
1
-10
/
+24
2020-08-31
Add test for `riscv repeat_read`. (#293)
Tim Newsome
1
-0
/
+34
2020-08-12
Point people at a compiler that supports vectors. (#290)
Tim Newsome
1
-1
/
+2
2020-08-06
Add enable_rtos_riscv (#288)
Tim Newsome
1
-0
/
+2
2020-07-14
bump env to fix #286
Andrew Waterman
1
-14
/
+14
2020-07-01
Make pylint happy. (#285)
Tim Newsome
1
-0
/
+1
2020-06-25
Add manual hwbp test. (#283)
Tim Newsome
4
-0
/
+98
2020-06-25
Create a more sophisticated vector test (#284)
Tim Newsome
4
-10
/
+248
2020-05-26
Test semihosting calls (#280)
Tim Newsome
9
-5
/
+205
2020-05-18
Parse "cannot insert breakpoint" message. (#279)
Tim Newsome
1
-1
/
+8
2020-05-13
Update env (#275)
Paul Donahue
1
-5
/
+19
2020-04-17
The HTIF device must live in its own page since it is (generally) a bus/hardw...
Adrian Harris
1
-0
/
+1
2020-04-10
Make TooManyHwbp more thorough. (#272)
Tim Newsome
1
-1
/
+6
2020-04-10
Change slen to a value that spike supports. (#271)
Tim Newsome
1
-1
/
+3
2020-03-29
Add debug-check-fast target for
Andrew Waterman
1
-0
/
+4
2020-03-26
Improve address translation tests (#261)
Tim Newsome
4
-35
/
+59
2020-03-26
Write a NOP program in PrivRw test. (#260)
Tim Newsome
2
-9
/
+8
2020-03-21
Fix regression introduced by 24d7d6b68c5581c36cbdef354b1882a7a8dd52c5
Andrew Waterman
1
-7
/
+7
2020-03-21
Move self-modifying 'fence.i' ops to .data memory section (#269)
WRansohoff
1
-6
/
+14
2020-03-19
Fix comments error in fmin.S (#267)
Mohanson
2
-4
/
+4
2020-03-18
Spike changed --varch syntax (#257)
Tim Newsome
1
-2
/
+2
2020-03-18
Specify misa for HiFive Unleashed. (#259)
Tim Newsome
1
-0
/
+2
2020-03-18
Have both rs=rd and rs!=rd cases in csr.S (#263)
Takahiro
1
-12
/
+15
2020-03-18
Fix shamt.S header (#264)
Takahiro
1
-2
/
+2
2020-03-16
Add a test case rs = rd to jalr.S (#258)
Takahiro
1
-0
/
+16
2020-03-11
Add comment explaining convoluted rv64mi-p-scall behavior
Andrew Waterman
1
-0
/
+6
2020-03-11
Revert "scall: make the intention of the test in machine mode more clear (#246)"
Andrew Waterman
1
-6
/
+1
2020-03-11
Setup a multilevel page table to avoid misaligned superpages caused by variab...
Cedric Orban
1
-0
/
+4
2020-03-06
Don't assume reset state of mscratch (#254)
Paul Donahue
2
-13
/
+13
2020-03-05
bump env (#253)
Han-Kuan Chen
1
-12
/
+12
2020-03-05
Bump riscv-test-env (#252)
Andrew Waterman
1
-5
/
+17
2020-03-05
Clean up gdb parsing code. (#247)
Tim Newsome
1
-42
/
+32
2020-03-05
Add a simple mechanism to skip tests on targets. (#251)
Tim Newsome
2
-1
/
+9
2020-03-02
enable rv32e compatability by replacing reg x29 with reg x7 (#250)
Cedric Orban
1
-12
/
+12
2020-02-27
bump env
Andrew Waterman
1
-10
/
+5
2020-02-21
scall: make the intention of the test in machine mode more clear (#246)
Nils Asmussen
1
-1
/
+6
2020-02-20
Fix rv64mi-p-csr on systems with FPUs
Andrew Waterman
1
-2
/
+3
2020-02-14
Add tests for vector register access (#244)
Tim Newsome
5
-34
/
+137
2020-02-11
Generate very different values on different harts. (#238)
Tim Newsome
2
-4
/
+5
2020-02-11
Run OpenOCD output through spike-dasm. (#239)
Tim Newsome
1
-3
/
+9
2020-02-11
Look for \bmain\b instead of ' main '. (#237)
Tim Newsome
1
-2
/
+2
2020-02-08
Solves https://github.com/riscv/riscv-tests/issues/241 : Each mhartid has the...
Sho Nakatani
1
-2
/
+2
2020-01-31
Added CSR test cases on whether writing 0 to CSR works, as that might get ove...
Torbjørn Viem Ness
1
-0
/
+2
2020-01-15
Force DMI busy in all tests. (#235)
Tim Newsome
2
-15
/
+44
2020-01-09
Smoke test virtual address translation support. (#233)
Tim Newsome
6
-13
/
+231
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