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| author | Andrew Waterman <andrew@sifive.com> | 2017-03-21 16:46:43 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-03-21 16:46:43 -0700 |
| commit | 96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac (patch) | |
| tree | ef6d18dbf4119755c469ed90948839ac6af28bbf /isa/rv64ui/sb.S | |
| parent | 33a1beb24e65c32aa8e2f2547da27eb3e24c4cc9 (diff) | |
| download | riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.zip riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.tar.gz riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.tar.bz2 | |
Avoid x3 (gp), which is now TESTNUM
Diffstat (limited to 'isa/rv64ui/sb.S')
| -rw-r--r-- | isa/rv64ui/sb.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/isa/rv64ui/sb.S b/isa/rv64ui/sb.S index 17ab2e2..19e32d6 100644 --- a/isa/rv64ui/sb.S +++ b/isa/rv64ui/sb.S @@ -31,23 +31,23 @@ RVTEST_CODE_BEGIN # Test with a negative base - TEST_CASE( 10, x3, 0x78, \ + TEST_CASE( 10, x5, 0x78, \ la x1, tdat9; \ li x2, 0x12345678; \ addi x4, x1, -32; \ sb x2, 32(x4); \ - lb x3, 0(x1); \ + lb x5, 0(x1); \ ) # Test with unaligned base - TEST_CASE( 11, x3, 0xffffffffffffff98, \ + TEST_CASE( 11, x5, 0xffffffffffffff98, \ la x1, tdat9; \ li x2, 0x00003098; \ addi x1, x1, -6; \ sb x2, 7(x1); \ la x4, tdat10; \ - lb x3, 0(x4); \ + lb x5, 0(x4); \ ) #------------------------------------------------------------- |