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author | Andrew Waterman <andrew@sifive.com> | 2017-03-21 16:46:43 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-03-21 16:46:43 -0700 |
commit | 96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac (patch) | |
tree | ef6d18dbf4119755c469ed90948839ac6af28bbf /isa/rv64ud | |
parent | 33a1beb24e65c32aa8e2f2547da27eb3e24c4cc9 (diff) | |
download | riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.zip riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.tar.gz riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.tar.bz2 |
Avoid x3 (gp), which is now TESTNUM
Diffstat (limited to 'isa/rv64ud')
-rw-r--r-- | isa/rv64ud/structural.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/isa/rv64ud/structural.S b/isa/rv64ud/structural.S index 76c6691..5ecbb96 100644 --- a/isa/rv64ud/structural.S +++ b/isa/rv64ud/structural.S @@ -30,8 +30,8 @@ li x1, 0x3F800000 nops ;\ fsgnj.s f3, f1, f1 ;\ fmv.x.d x4, f4 ;\ - fmv.x.s x3, f3 ;\ - beq x1, x3, 2f ;\ + fmv.x.s x5, f3 ;\ + beq x1, x5, 2f ;\ RVTEST_FAIL ;\ 2:beq x2, x4, 2f ;\ RVTEST_FAIL; \ |