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author | Andrew Waterman <aswaterman@gmail.com> | 2017-11-11 16:15:22 -0800 |
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committer | GitHub <noreply@github.com> | 2017-11-11 16:15:22 -0800 |
commit | 6cd865488a4ef49f0f68f46ef619f097a0ae9ec0 (patch) | |
tree | 6a2b35c60ef918172c316f0de45d98df0cb2d648 /isa/rv64uc/rvc.S | |
parent | d9b4071ea4a9a2fe84a51443250184f51e931ac2 (diff) | |
download | riscv-tests-6cd865488a4ef49f0f68f46ef619f097a0ae9ec0.zip riscv-tests-6cd865488a4ef49f0f68f46ef619f097a0ae9ec0.tar.gz riscv-tests-6cd865488a4ef49f0f68f46ef619f097a0ae9ec0.tar.bz2 |
Make sure that code is 4-byte aligned before disabling rvc (#100)
Diffstat (limited to 'isa/rv64uc/rvc.S')
-rw-r--r-- | isa/rv64uc/rvc.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/isa/rv64uc/rvc.S b/isa/rv64uc/rvc.S index b0766a9..3629d1d 100644 --- a/isa/rv64uc/rvc.S +++ b/isa/rv64uc/rvc.S @@ -13,11 +13,12 @@ RVTEST_RV64U RVTEST_CODE_BEGIN + .align 2 .option push .option norvc #define RVC_TEST_CASE(n, r, v, code...) \ - TEST_CASE (n, r, v, .option push; .option rvc; code; .option pop) + TEST_CASE (n, r, v, .option push; .option rvc; code; .align 2; .option pop) // Make sure fetching a 4-byte instruction across a page boundary works. li TESTNUM, 2 |