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authorCedric Orban <53445936+cedric-orban@users.noreply.github.com>2020-03-11 15:55:42 -0700
committerGitHub <noreply@github.com>2020-03-11 15:55:42 -0700
commit72d284b28c9b728fd978b5c17a1fefc1888623db (patch)
tree848ec504cad1df7fa8d5d936474992d2eebfc6c7 /isa/rv64si
parent60e314e4d2a776b9356e47aef4f9fe5863a0c799 (diff)
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Setup a multilevel page table to avoid misaligned superpages caused by variable DRAM_BASE (#255)
* setup a multilevel page table to avoid misaligned superpages * Revert "setup a multilevel page table to avoid misaligned superpages" This reverts commit 73c142df7dbdd3a5347ef228a368fb58b0b12be5. * statically fail if DRAM_BASE is not superpage-aligned
Diffstat (limited to 'isa/rv64si')
-rw-r--r--isa/rv64si/dirty.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/isa/rv64si/dirty.S b/isa/rv64si/dirty.S
index 8444196..15f3163 100644
--- a/isa/rv64si/dirty.S
+++ b/isa/rv64si/dirty.S
@@ -10,6 +10,10 @@
#include "riscv_test.h"
#include "test_macros.h"
+#if (DRAM_BASE >> 30 << 30) != DRAM_BASE
+# error This test requires DRAM_BASE be SV39 superpage-aligned
+#endif
+
RVTEST_RV64M
RVTEST_CODE_BEGIN