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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-02-28 23:24:46 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-03 11:03:59 -0800 |
| commit | 9fc686ae1488a596d0bed561a750396911e71b01 (patch) | |
| tree | 498111683f3c76620ad1299fbed6deab1b1af797 /isa/rv64mi | |
| parent | 08486cb632ef704709a89fc6bab5842bec4c2547 (diff) | |
| download | riscv-tests-9fc686ae1488a596d0bed561a750396911e71b01.zip riscv-tests-9fc686ae1488a596d0bed561a750396911e71b01.tar.gz riscv-tests-9fc686ae1488a596d0bed561a750396911e71b01.tar.bz2 | |
WIP on priv spec v1.9
Diffstat (limited to 'isa/rv64mi')
| -rw-r--r-- | isa/rv64mi/dirty.S | 4 | ||||
| -rw-r--r-- | isa/rv64mi/ipi.S | 2 | ||||
| -rw-r--r-- | isa/rv64mi/mcsr.S | 8 | ||||
| -rw-r--r-- | isa/rv64mi/timer.S | 4 |
4 files changed, 11 insertions, 7 deletions
diff --git a/isa/rv64mi/dirty.S b/isa/rv64mi/dirty.S index 2be4921..731d80d 100644 --- a/isa/rv64mi/dirty.S +++ b/isa/rv64mi/dirty.S @@ -15,9 +15,10 @@ RVTEST_CODE_BEGIN # Turn on VM with superpage identity mapping la a1, page_table_1 + srl a1, a1, RISCV_PGSHIFT csrw sptbr, a1 sfence.vm - li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_PRV1 & ~(MSTATUS_PRV1<<1)) * PRV_S) + li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_MPP & ~(MSTATUS_MPP<<1)) * PRV_S) csrs mstatus, a1 la a1, 1f csrw mepc, a1 @@ -32,6 +33,7 @@ RVTEST_CODE_BEGIN # Load new page table li TESTNUM, 3 la t0, page_table_2 + srl t0, t0, RISCV_PGSHIFT csrw sptbr, t0 sfence.vm diff --git a/isa/rv64mi/ipi.S b/isa/rv64mi/ipi.S index 8aca665..7178310 100644 --- a/isa/rv64mi/ipi.S +++ b/isa/rv64mi/ipi.S @@ -14,7 +14,7 @@ RVTEST_RV64M RVTEST_CODE_BEGIN # enable interrupts - csrs mstatus, MSTATUS_IE + csrs mstatus, MSTATUS_MIE csrs mie, MIP_MSIP # get a unique core id diff --git a/isa/rv64mi/mcsr.S b/isa/rv64mi/mcsr.S index c1e2cd3..8a451ca 100644 --- a/isa/rv64mi/mcsr.S +++ b/isa/rv64mi/mcsr.S @@ -14,13 +14,15 @@ RVTEST_RV64M RVTEST_CODE_BEGIN # Check that mcpuid reports RV64 - TEST_CASE(2, a0, 0x2, csrr a0, mcpuid; srl a0, a0, 62) + TEST_CASE(2, a0, 0x2, csrr a0, misa; srl a0, a0, 62) # Check that mhartid reports 0 TEST_CASE(3, a0, 0x0, csrr a0, mhartid) - # Check that mimpid reports UC Berkeley - TEST_CASE(4, a0, 0x1, csrr a0, mimpid; sll a0, a0, 48; srl a0, a0, 48) + # Check that reading mimpid, marchid, and mvendorid doesn't cause exceptions + csrr a0, mimpid + csrr a0, marchid + csrr a0, mvendorid # Check that mtvec reports DEFAULT_MTVEC TEST_CASE(5, a0, DEFAULT_MTVEC, csrr a0, mtvec) diff --git a/isa/rv64mi/timer.S b/isa/rv64mi/timer.S index b7cc633..4697793 100644 --- a/isa/rv64mi/timer.S +++ b/isa/rv64mi/timer.S @@ -24,7 +24,7 @@ RVTEST_CODE_BEGIN csrw mtimecmp, a0 li a0, MIP_MTIP csrs mie, a0 - csrs mstatus, MSTATUS_IE + csrs mstatus, MSTATUS_MIE # advance an LFSR until the timer has fired enough times li s0, 1023 @@ -64,7 +64,7 @@ mtvec_handler: bgez t0, fail sll t0, t0, 1 - addi t0, t0, -2*IRQ_TIMER + addi t0, t0, -2*IRQ_M_TIMER bnez t0, fail csrr t0, mtime |