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authorAndrew Waterman <waterman@cs.berkeley.edu>2016-07-11 17:45:16 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2016-07-11 17:45:16 -0700
commit089f4aae4836af1f3f530fbedc3a43a685eae0d1 (patch)
tree76bc328ba3e17aa6caab7957afb250c6ab0eb6c6 /isa/rv64mi
parenta5b7f805c111e14a1478153147a57283a0b9e45d (diff)
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Remove instruction width assumptions to support RVC
Diffstat (limited to 'isa/rv64mi')
-rw-r--r--isa/rv64mi/dirty.S1
-rw-r--r--isa/rv64mi/ma_addr.S1
2 files changed, 2 insertions, 0 deletions
diff --git a/isa/rv64mi/dirty.S b/isa/rv64mi/dirty.S
index 66ed5a0..0314cf5 100644
--- a/isa/rv64mi/dirty.S
+++ b/isa/rv64mi/dirty.S
@@ -52,6 +52,7 @@ RVTEST_CODE_BEGIN
TEST_PASSFAIL
+ .align 2
stvec_handler:
csrr t0, scause
li t1, 2
diff --git a/isa/rv64mi/ma_addr.S b/isa/rv64mi/ma_addr.S
index ed177f5..c84242a 100644
--- a/isa/rv64mi/ma_addr.S
+++ b/isa/rv64mi/ma_addr.S
@@ -14,6 +14,7 @@ RVTEST_RV64M
RVTEST_CODE_BEGIN
.align 3
+ .option norvc
auipc s0, 0
# indicate it's a load test