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| author | Tim Newsome <tim@sifive.com> | 2022-12-01 10:30:50 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-12-01 10:30:50 -0800 |
| commit | 6d915ba5dab4f7b087af7aac080b23a9255d8b18 (patch) | |
| tree | e30390103d792885dadd57dd4929f90bccdc2047 /isa/rv32uzfh | |
| parent | 6a4225fae83a1ad9bf9687c13f1046baa401269e (diff) | |
| download | riscv-tests-6d915ba5dab4f7b087af7aac080b23a9255d8b18.zip riscv-tests-6d915ba5dab4f7b087af7aac080b23a9255d8b18.tar.gz riscv-tests-6d915ba5dab4f7b087af7aac080b23a9255d8b18.tar.bz2 | |
`flush regs` -> `maintenance flush register-cache` (#431)
`flush regs` is being deprecated.
Diffstat (limited to 'isa/rv32uzfh')
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