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| author | Eric Love <ericlove@s144.Millennium.Berkeley.EDU> | 2014-01-23 16:42:19 -0800 |
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| committer | Eric Love <ericlove@s144.Millennium.Berkeley.EDU> | 2014-01-23 16:42:19 -0800 |
| commit | 68b9b6b1e83af86bff8c4a36c3e2d186e21bbb90 (patch) | |
| tree | b6ff10712d6ea26b2873b5c2dbcc7d961ea81330 /isa/rv32ui/srl.S | |
| parent | 53f417a9acfc2f2517aa93be38875d17b408ec59 (diff) | |
| download | riscv-tests-68b9b6b1e83af86bff8c4a36c3e2d186e21bbb90.zip riscv-tests-68b9b6b1e83af86bff8c4a36c3e2d186e21bbb90.tar.gz riscv-tests-68b9b6b1e83af86bff8c4a36c3e2d186e21bbb90.tar.bz2 | |
Fixed srl, srli
Diffstat (limited to 'isa/rv32ui/srl.S')
| -rw-r--r-- | isa/rv32ui/srl.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/isa/rv32ui/srl.S b/isa/rv32ui/srl.S index 8f8719d..d1de5ce 100644 --- a/isa/rv32ui/srl.S +++ b/isa/rv32ui/srl.S @@ -35,10 +35,10 @@ RVTEST_CODE_BEGIN # Verify that shifts only use bottom five bits - TEST_RR_OP( 17, srl, 0x21212121, 0x21212121, 0xffffffc0 ); - TEST_RR_OP( 18, srl, 0x10909090, 0x21212121, 0xffffffc1 ); - TEST_RR_OP( 19, srl, 0x00424242, 0x21212121, 0xffffffc7 ); - TEST_RR_OP( 20, srl, 0x00008484, 0x21212121, 0xffffffce ); + TEST_RR_OP( 17, srl, 0x21212121, 0x21212121, 0xffffffe0 ); + TEST_RR_OP( 18, srl, 0x10909090, 0x21212121, 0xffffffe1 ); + TEST_RR_OP( 19, srl, 0x00424242, 0x21212121, 0xffffffe7 ); + TEST_RR_OP( 20, srl, 0x00008484, 0x21212121, 0xffffffee ); TEST_RR_OP( 21, srl, 0x00000000, 0x21212121, 0xffffffff ); #------------------------------------------------------------- |