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author | Howard Mao <zhehao.mao@gmail.com> | 2016-06-22 15:53:38 -0700 |
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committer | Howard Mao <zhehao.mao@gmail.com> | 2016-06-22 15:53:38 -0700 |
commit | 51671844c2588386ce3eacedf40d385e3c2b1484 (patch) | |
tree | 3ad4c759cb0b4c9712a95d11f99a6241877a169e /isa/rv32ua/amomin_w.S | |
parent | b6b5e81217c1f2a70ecb6883b1756859cd7bb999 (diff) | |
download | riscv-tests-51671844c2588386ce3eacedf40d385e3c2b1484.zip riscv-tests-51671844c2588386ce3eacedf40d385e3c2b1484.tar.gz riscv-tests-51671844c2588386ce3eacedf40d385e3c2b1484.tar.bz2 |
separate ua and um tests from ui testssplit-isa-tests
Diffstat (limited to 'isa/rv32ua/amomin_w.S')
-rw-r--r-- | isa/rv32ua/amomin_w.S | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/isa/rv32ua/amomin_w.S b/isa/rv32ua/amomin_w.S new file mode 100644 index 0000000..a6a0947 --- /dev/null +++ b/isa/rv32ua/amomin_w.S @@ -0,0 +1,49 @@ +# See LICENSE for license details. + +#***************************************************************************** +# amomin_d.S +#----------------------------------------------------------------------------- +# +# Test amomin.w instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + TEST_CASE(2, a4, 0x80000000, \ + li a0, 0x80000000; \ + li a1, 0xfffff800; \ + la a3, amo_operand; \ + sw a0, 0(a3); \ + amomin.w a4, a1, 0(a3); \ + ) + + TEST_CASE(3, a5, 0x80000000, lw a5, 0(a3)) + + TEST_CASE(4, a4, 0, \ + li a1, 0xffffffff; \ + sw x0, 0(a3); \ + amomin.w a4, a1, 0(a3); \ + ) + + TEST_CASE(5, a5, 0xffffffff, lw a5, 0(a3)) + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END + + .bss + .align 3 +amo_operand: + .dword 0 + .skip 65536 |