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authorAndrew Waterman <waterman@eecs.berkeley.edu>2013-11-24 14:33:35 -0800
committerAndrew Waterman <waterman@eecs.berkeley.edu>2013-11-24 14:33:48 -0800
commit2e4376c4acf1e9460ca714102dd955a9bd10c488 (patch)
tree9bf77f937059b71c7d51316f92f1cff29b872d5f /isa/macros
parentfdf5e6f97d53722d7ec44c4591f1ab740a092808 (diff)
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Update to new privileged ISA
Diffstat (limited to 'isa/macros')
-rw-r--r--isa/macros/scalar/test_macros.h22
-rw-r--r--isa/macros/vector/test_macros.h14
2 files changed, 20 insertions, 16 deletions
diff --git a/isa/macros/scalar/test_macros.h b/isa/macros/scalar/test_macros.h
index b856701..10680d4 100644
--- a/isa/macros/scalar/test_macros.h
+++ b/isa/macros/scalar/test_macros.h
@@ -46,23 +46,25 @@ pass_ ## testnum: \
# Tests for instructions with immediate operand
#-----------------------------------------------------------------------
+#define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
+
#define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
TEST_CASE( testnum, x3, result, \
li x1, val1; \
- inst x3, x1, imm; \
+ inst x3, x1, SEXT_IMM(imm); \
)
#define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
TEST_CASE( testnum, x1, result, \
li x1, val1; \
- inst x1, x1, imm; \
+ inst x1, x1, SEXT_IMM(imm); \
)
#define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
TEST_CASE( testnum, x6, result, \
li x4, 0; \
1: li x1, val1; \
- inst x3, x1, imm; \
+ inst x3, x1, SEXT_IMM(imm); \
TEST_INSERT_NOPS_ ## nop_cycles \
addi x6, x3, 0; \
addi x4, x4, 1; \
@@ -75,7 +77,7 @@ pass_ ## testnum: \
li x4, 0; \
1: li x1, val1; \
TEST_INSERT_NOPS_ ## nop_cycles \
- inst x3, x1, imm; \
+ inst x3, x1, SEXT_IMM(imm); \
addi x4, x4, 1; \
li x5, 2; \
bne x4, x5, 1b \
@@ -83,13 +85,13 @@ pass_ ## testnum: \
#define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
TEST_CASE( testnum, x1, result, \
- inst x1, x0, imm; \
+ inst x1, x0, SEXT_IMM(imm); \
)
#define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
TEST_CASE( testnum, x0, 0, \
li x1, val1; \
- inst x0, x1, imm; \
+ inst x0, x1, SEXT_IMM(imm); \
)
#-----------------------------------------------------------------------
@@ -563,9 +565,9 @@ test_ ## testnum: \
#-----------------------------------------------------------------------
#define TEST_ILLEGAL_TVEC_REGID( testnum, nxreg, nfreg, inst, reg1, reg2) \
- setpcr status, SR_EI; \
+ csrs status, SR_EI; \
la a0, handler ## testnum; \
- mtpcr a0, evec; \
+ csrw evec, a0; \
vsetcfg nxreg, nfreg; \
li a0, 4; \
vsetvl a0, a0; \
@@ -624,9 +626,9 @@ handler ## testnum: \
bne a1,a2,fail; \
#define TEST_ILLEGAL_VT_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, reg3) \
- setpcr status, SR_EI; \
+ csrs status, SR_EI; \
la a0, handler ## testnum; \
- mtpcr a0, evec; \
+ csrw evec, a0; \
vsetcfg nxreg, nfreg; \
li a0, 4; \
vsetvl a0, a0; \
diff --git a/isa/macros/vector/test_macros.h b/isa/macros/vector/test_macros.h
index 59e9e77..932aba3 100644
--- a/isa/macros/vector/test_macros.h
+++ b/isa/macros/vector/test_macros.h
@@ -64,22 +64,24 @@ next ## testnum :
# Tests for instructions with immediate operand
#-----------------------------------------------------------------------
+#define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
+
#define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
TEST_CASE_NREG( testnum, 4, 0, x3, result, \
li x1, val1; \
- inst x3, x1, imm; \
+ inst x3, x1, SEXT_IMM(imm); \
)
#define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
TEST_CASE_NREG( testnum, 2, 0, x1, result, \
li x1, val1; \
- inst x1, x1, imm; \
+ inst x1, x1, SEXT_IMM(imm); \
)
#define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
TEST_CASE_NREG( testnum, 5, 0, x4, result, \
li x1, val1; \
- inst x3, x1, imm; \
+ inst x3, x1, SEXT_IMM(imm); \
TEST_INSERT_NOPS_ ## nop_cycles \
addi x4, x3, 0; \
)
@@ -88,18 +90,18 @@ next ## testnum :
TEST_CASE_NREG( testnum, 4, 0, x3, result, \
li x1, val1; \
TEST_INSERT_NOPS_ ## nop_cycles \
- inst x3, x1, imm; \
+ inst x3, x1, SEXT_IMM(imm); \
)
#define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
TEST_CASE_NREG( testnum, 2, 0, x1, result, \
- inst x1, x0, imm; \
+ inst x1, x0, SEXT_IMM(imm); \
)
#define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
TEST_CASE_NREG( testnum, 2, 0, x0, 0, \
li x1, val1; \
- inst x0, x1, imm; \
+ inst x0, x1, SEXT_IMM(imm); \
)
#-----------------------------------------------------------------------