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| author | Andrew Waterman <andrew@sifive.com> | 2017-01-04 11:42:25 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-01-04 11:42:25 -0800 |
| commit | acc35f32c788fdcbb854f8fb6d74026050ced273 (patch) | |
| tree | 8f9bb77ad2d0e6650ac4f9898a0032d0d736e015 /isa/macros/scalar | |
| parent | 2129261a6567a0d9705f7b7c7609d22b1d183b00 (diff) | |
| download | riscv-tests-acc35f32c788fdcbb854f8fb6d74026050ced273.zip riscv-tests-acc35f32c788fdcbb854f8fb6d74026050ced273.tar.gz riscv-tests-acc35f32c788fdcbb854f8fb6d74026050ced273.tar.bz2 | |
Remove Hwacha macros
Diffstat (limited to 'isa/macros/scalar')
| -rw-r--r-- | isa/macros/scalar/test_macros.h | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/isa/macros/scalar/test_macros.h b/isa/macros/scalar/test_macros.h index cd7d21d..11645fe 100644 --- a/isa/macros/scalar/test_macros.h +++ b/isa/macros/scalar/test_macros.h @@ -90,34 +90,6 @@ test_ ## testnum: \ ) #----------------------------------------------------------------------- -# Tests for vector config instructions -#----------------------------------------------------------------------- - -#define TEST_VSETCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \ - TEST_CASE( testnum, x1, result, \ - li x1, (bank << 12); \ - vsetcfg x1,nxpr,nfpr; \ - li x1, vl; \ - vsetvl x1,x1; \ - ) - -#define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \ - TEST_CASE( testnum, x1, result, \ - li x1, (bank << 12) | (nfpr << 6) | nxpr; \ - vsetcfg x1; \ - li x1, vl; \ - vsetvl x1,x1; \ - ) - -#define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \ - TEST_CASE( testnum, x1, result, \ - li x1, (bank << 12); \ - vsetcfg x1,nxpr,nfpr; \ - li x1, vl; \ - vsetvl x1, x1; \ - ) - -#----------------------------------------------------------------------- # Tests for an instruction with register operands #----------------------------------------------------------------------- |