diff options
author | Tommy Murphy <tommy_murphy@hotmail.com> | 2024-06-27 21:41:12 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2024-06-27 13:41:12 -0700 |
commit | b0eb63a6cb11842c6aeeb7f92340d09728c35caa (patch) | |
tree | 18358394f152a902f8f6af60767ba9784a88679d /debug | |
parent | 74c9c148da79a88c83039ffdd59da8e7c1bf407f (diff) | |
download | riscv-tests-b0eb63a6cb11842c6aeeb7f92340d09728c35caa.zip riscv-tests-b0eb63a6cb11842c6aeeb7f92340d09728c35caa.tar.gz riscv-tests-b0eb63a6cb11842c6aeeb7f92340d09728c35caa.tar.bz2 |
Change DTM IDCODE from SiFive HiFive1's 0x10e31913 to Spike's 0xdeadbeef (#565)
Diffstat (limited to 'debug')
-rw-r--r-- | debug/targets/RISC-V/spike-1.cfg | 2 | ||||
-rw-r--r-- | debug/targets/RISC-V/spike-2-hwthread.cfg | 2 | ||||
-rw-r--r-- | debug/targets/RISC-V/spike-2.cfg | 2 | ||||
-rw-r--r-- | debug/targets/RISC-V/spike-multi.cfg | 4 |
4 files changed, 5 insertions, 5 deletions
diff --git a/debug/targets/RISC-V/spike-1.cfg b/debug/targets/RISC-V/spike-1.cfg index c6c7d2d..3fdae97 100644 --- a/debug/targets/RISC-V/spike-1.cfg +++ b/debug/targets/RISC-V/spike-1.cfg @@ -5,7 +5,7 @@ remote_bitbang host $::env(REMOTE_BITBANG_HOST) remote_bitbang port $::env(REMOTE_BITBANG_PORT) set _CHIPNAME riscv -jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913 +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0xdeadbeef set _TARGETNAME $_CHIPNAME.cpu if {$::env(USE_FREERTOS)} { diff --git a/debug/targets/RISC-V/spike-2-hwthread.cfg b/debug/targets/RISC-V/spike-2-hwthread.cfg index c10ad8f..5a08ece 100644 --- a/debug/targets/RISC-V/spike-2-hwthread.cfg +++ b/debug/targets/RISC-V/spike-2-hwthread.cfg @@ -6,7 +6,7 @@ remote_bitbang host $::env(REMOTE_BITBANG_HOST) remote_bitbang port $::env(REMOTE_BITBANG_PORT) set _CHIPNAME riscv -jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913 +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0xdeadbeef set _TARGETNAME_0 $_CHIPNAME.cpu0 set _TARGETNAME_1 $_CHIPNAME.cpu1 diff --git a/debug/targets/RISC-V/spike-2.cfg b/debug/targets/RISC-V/spike-2.cfg index ebf3c5a..2de4256 100644 --- a/debug/targets/RISC-V/spike-2.cfg +++ b/debug/targets/RISC-V/spike-2.cfg @@ -6,7 +6,7 @@ remote_bitbang host $::env(REMOTE_BITBANG_HOST) remote_bitbang port $::env(REMOTE_BITBANG_PORT) set _CHIPNAME riscv -jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913 +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0xdeadbeef set _TARGETNAME_0 $_CHIPNAME.cpu0 set _TARGETNAME_1 $_CHIPNAME.cpu1 diff --git a/debug/targets/RISC-V/spike-multi.cfg b/debug/targets/RISC-V/spike-multi.cfg index 36d4328..dff325e 100644 --- a/debug/targets/RISC-V/spike-multi.cfg +++ b/debug/targets/RISC-V/spike-multi.cfg @@ -5,8 +5,8 @@ adapter driver remote_bitbang remote_bitbang host $::env(REMOTE_BITBANG_HOST) remote_bitbang port $::env(REMOTE_BITBANG_PORT) -jtag newtap riscv.0 cpu -irlen 5 -expected-id 0x10e31913 -jtag newtap riscv.1 cpu -irlen 5 -expected-id 0x10e31913 +jtag newtap riscv.0 cpu -irlen 5 -expected-id 0xdeadbeef +jtag newtap riscv.1 cpu -irlen 5 -expected-id 0xdeadbeef target create riscv.0.cpu0 riscv -chain-position riscv.0.cpu -coreid 0 target create riscv.0.cpu1 riscv -chain-position riscv.0.cpu -coreid 1 |