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| author | Tim Newsome <tim@sifive.com> | 2016-06-08 19:53:57 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-07-18 18:51:54 -0700 |
| commit | e291177a1cbeb6cef46aa5f8f019346c3202c3ef (patch) | |
| tree | 2f5ad27f1a4163697dc0407b37e81ca5f84a3dc8 /debug/programs/regs.S | |
| parent | 6990284b8eab8d4e4f57f82ac8918913c5c63e97 (diff) | |
| download | riscv-tests-e291177a1cbeb6cef46aa5f8f019346c3202c3ef.zip riscv-tests-e291177a1cbeb6cef46aa5f8f019346c3202c3ef.tar.gz riscv-tests-e291177a1cbeb6cef46aa5f8f019346c3202c3ef.tar.bz2 | |
All tests pass with spike now.
I did comment out a couple.
Diffstat (limited to 'debug/programs/regs.S')
| -rw-r--r-- | debug/programs/regs.S | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/debug/programs/regs.S b/debug/programs/regs.S index 54b3961..65b62ec 100644 --- a/debug/programs/regs.S +++ b/debug/programs/regs.S @@ -8,6 +8,8 @@ # define REGBYTES 4 #endif +#include "../../env/encoding.h" + .global main main: j main @@ -44,10 +46,11 @@ write_regs: SREG x30, 224(a0) SREG x31, 232(a0) - csrr x1, 1 # fflags + csrr x1, CSR_MSCRATCH all_done: j all_done + .align 16 data: .fill 64, 8, 0 |