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authorTim Newsome <tim@sifive.com>2022-10-21 09:23:36 -0700
committerGitHub <noreply@github.com>2022-10-21 09:23:36 -0700
commit7e77eedc514a6538e07b666c36449e54080054b7 (patch)
tree69bc3364de7a87659287db016c3b9ac8787f551b /debug/bin
parent1d03f2a827f2a37f7d7b65218ef679fbafc797da (diff)
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Change memory address used in debug tests. (#422)
https://github.com/riscv-software-src/riscv-isa-sim/pull/889 put a UART at the address we were using in our 32-bit debug tests.
Diffstat (limited to 'debug/bin')
-rw-r--r--debug/bin/README.md2
-rw-r--r--debug/bin/RTOSDemo32.axfbin131616 -> 131544 bytes
2 files changed, 1 insertions, 1 deletions
diff --git a/debug/bin/README.md b/debug/bin/README.md
index 7e81515..39576a2 100644
--- a/debug/bin/README.md
+++ b/debug/bin/README.md
@@ -3,5 +3,5 @@ This directory contains binaries that are not easy to compile.
RTOSDemo32.axf and RTOSDemo64.axf are created by checking out
https://github.com/FreeRTOS/FreeRTOS, following the instructions in
`FreeRTOS/Demo/RISC-V-spike-htif_GCC/README.md`, and building:
-* `make XLEN=32 BASE_ADDRESS=0x10000000`
+* `make XLEN=32 BASE_ADDRESS=0x10100000`
* `make XLEN=64 BASE_ADDRESS=0x1212340000`
diff --git a/debug/bin/RTOSDemo32.axf b/debug/bin/RTOSDemo32.axf
index 5fa3fe7..88d49f4 100644
--- a/debug/bin/RTOSDemo32.axf
+++ b/debug/bin/RTOSDemo32.axf
Binary files differ