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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-05-09 16:39:39 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-05-09 16:39:39 -0700 |
| commit | a60626553be99d69f879464dbeb71ffe1ff80c75 (patch) | |
| tree | 9addb6b177536179dc4d9b72b510cbe7f0f70a78 /benchmarks | |
| parent | 5ce97df1c97b4ef39b94041350b910d12f782328 (diff) | |
| download | riscv-tests-a60626553be99d69f879464dbeb71ffe1ff80c75.zip riscv-tests-a60626553be99d69f879464dbeb71ffe1ff80c75.tar.gz riscv-tests-a60626553be99d69f879464dbeb71ffe1ff80c75.tar.bz2 | |
Update to privileged architecture version 1.7
Diffstat (limited to 'benchmarks')
| -rw-r--r-- | benchmarks/common/crt.S | 16 | ||||
| -rw-r--r-- | benchmarks/common/syscalls.c | 8 | ||||
| -rw-r--r-- | benchmarks/common/test.ld | 2 |
3 files changed, 8 insertions, 18 deletions
diff --git a/benchmarks/common/crt.S b/benchmarks/common/crt.S index 97b90d5..dc16228 100644 --- a/benchmarks/common/crt.S +++ b/benchmarks/common/crt.S @@ -67,23 +67,13 @@ _start: li t0, MSTATUS_FS; csrs mstatus, t0 # enable FPU li t0, MSTATUS_XS; csrs mstatus, t0 # enable accelerator - li t0, ((MSTATUS64_UA & ~(MSTATUS64_UA << 1)) * UA_RV64) >> 31 - sll t0, t0, 31 - li t1, ((MSTATUS64_SA & ~(MSTATUS64_SA << 1)) * UA_RV64) >> 31 - sll t1, t1, 31 #ifdef __riscv64 + csrr t0, mcpuid # make sure processor supports RV64 if this was compiled for RV64 - bnez t0, 1f + bltz t0, 1f li a0, 1234 j tohost_exit 1: - # enable RV64 for user and supervisor - csrs mstatus, t0 - csrs mstatus, t1 -#else - # disable RV64 for user and supervisor - csrc mstatus, t0 - csrc mstatus, t1 #endif csrr t0, mstatus @@ -138,7 +128,7 @@ _start: and tp, tp, -64 # get core id - csrr a0, hartid + csrr a0, mhartid # for now, assume only 1 core li a1, 1 1:bgeu a0, a1, 1b diff --git a/benchmarks/common/syscalls.c b/benchmarks/common/syscalls.c index 3c08bc2..0975acd 100644 --- a/benchmarks/common/syscalls.c +++ b/benchmarks/common/syscalls.c @@ -22,8 +22,8 @@ static long handle_frontend_syscall(long which, long arg0, long arg1, long arg2) magic_mem[2] = arg1; magic_mem[3] = arg2; __sync_synchronize(); - write_csr(tohost, (long)magic_mem); - while (swap_csr(fromhost, 0) == 0); + write_csr(mtohost, (long)magic_mem); + while (swap_csr(mfromhost, 0) == 0); return magic_mem[0]; } @@ -62,7 +62,7 @@ static int handle_stats(int enable) void tohost_exit(long code) { - write_csr(tohost, (code << 1) | 1); + write_csr(mtohost, (code << 1) | 1); while (1); } @@ -75,7 +75,7 @@ long handle_trap(long cause, long epc, long long regs[32]) if (cause == CAUSE_ILLEGAL_INSTRUCTION && (*(int*)epc & *csr_insn) == *csr_insn) ; - else if (cause != CAUSE_ECALL) + else if (cause != CAUSE_USER_ECALL) tohost_exit(1337); else if (regs[17] == SYS_exit) tohost_exit(regs[10]); diff --git a/benchmarks/common/test.ld b/benchmarks/common/test.ld index 082891c..db4ec45 100644 --- a/benchmarks/common/test.ld +++ b/benchmarks/common/test.ld @@ -21,7 +21,7 @@ SECTIONS { /* text: test code section */ - . = 0; + . = 0x100; .text : { crt.o(.text) |