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author | Gabriel L. Somlo <gsomlo@gmail.com> | 2019-06-11 10:51:01 -0400 |
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committer | Gabriel L. Somlo <gsomlo@gmail.com> | 2019-06-11 10:55:53 -0400 |
commit | 9c20a7744f7ad070094af0c1c29346fcfec50829 (patch) | |
tree | b4ebec71f912e2a2359f86e244a950bb54422166 /pk | |
parent | cb253a3f970b373df4390a0e7a17610556f920f3 (diff) | |
download | riscv-pk-9c20a7744f7ad070094af0c1c29346fcfec50829.zip riscv-pk-9c20a7744f7ad070094af0c1c29346fcfec50829.tar.gz riscv-pk-9c20a7744f7ad070094af0c1c29346fcfec50829.tar.bz2 |
Check for 'U' extension before accessing 'mcounteren' CSR
On 64-bit Rocket with 'DefaultFPGAConfig' (using 'WithNSmallCores'),
the 'U' extension is not supported, and accessing 'mcounteren' would
trigger an 'Illegal Instruction' trap.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Diffstat (limited to 'pk')
0 files changed, 0 insertions, 0 deletions