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| author | gsomlo <gsomlo@gmail.com> | 2020-12-15 16:11:40 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-12-15 13:11:40 -0800 |
| commit | 62bb5daea5ef014616b00a63c106afdd07e68ffd (patch) | |
| tree | 66d1d74fd95fa1a6b319ba857d6c3ca4ec434aa5 /pk | |
| parent | 5c159feca11473822906ec9595f7593aba60222f (diff) | |
| download | riscv-pk-62bb5daea5ef014616b00a63c106afdd07e68ffd.zip riscv-pk-62bb5daea5ef014616b00a63c106afdd07e68ffd.tar.gz riscv-pk-62bb5daea5ef014616b00a63c106afdd07e68ffd.tar.bz2 | |
Add support for the UART interface on the LiteX SoC (#230)
Tested using the RocketChip CPU option.
(see https://github.com/enjoy-digital/litex)
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Diffstat (limited to 'pk')
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