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authorAndrew Waterman <andrew@sifive.com>2024-04-25 16:27:22 -0700
committerAndrew Waterman <andrew@sifive.com>2024-05-20 18:37:48 -0700
commitbd29db434d09401375fa7550b547377b54dd01ef (patch)
tree7ba765c9dd069f5968934a13a0a70b7c4127a262 /machine
parentab24ff26666e14b3b6c4a8c8bb2c209d2587bb3e (diff)
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Fix emulation of misaligned c.swsp/c.sdsp with rd=x0
Diffstat (limited to 'machine')
-rw-r--r--machine/misaligned_ldst.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/machine/misaligned_ldst.c b/machine/misaligned_ldst.c
index 185897d..a421672 100644
--- a/machine/misaligned_ldst.c
+++ b/machine/misaligned_ldst.c
@@ -116,12 +116,12 @@ void misaligned_store_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc)
# if __riscv_xlen >= 64
else if ((insn & MASK_C_SD) == MATCH_C_SD)
len = 8, val.intx = GET_RS2S(insn, regs);
- else if ((insn & MASK_C_SDSP) == MATCH_C_SDSP && ((insn >> SH_RD) & 0x1f))
+ else if ((insn & MASK_C_SDSP) == MATCH_C_SDSP)
len = 8, val.intx = GET_RS2C(insn, regs);
# endif
else if ((insn & MASK_C_SW) == MATCH_C_SW)
len = 4, val.intx = GET_RS2S(insn, regs);
- else if ((insn & MASK_C_SWSP) == MATCH_C_SWSP && ((insn >> SH_RD) & 0x1f))
+ else if ((insn & MASK_C_SWSP) == MATCH_C_SWSP)
len = 4, val.intx = GET_RS2C(insn, regs);
# ifdef PK_ENABLE_FP_EMULATION
else if ((insn & MASK_C_FSD) == MATCH_C_FSD)